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CV145 Datasheet(PDF) 3 Page - Renesas Technology Corp |
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CV145 Datasheet(HTML) 3 Page - Renesas Technology Corp |
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3 / 14 page ![]() COMMERCIALTEMPERATURERANGE IDTCV145 1-TO-19DIFFERENTIALCLOCKBUFFER 3 PIN DESCRIPTION Pin Name Type Pin # Description CLK_IN, CLK_IN# IN 70,71 0.7vDifferentialinput DIF_[16:0] & DIF_[16:0]# OUT 6 - 9, 12 - 17, 22, 23, 25, 0.7VDifferentialclockoutputs,gearedtoaratiooftheinputclock 26, 30, 31, 33, 34, 38, 39, 41, 42, 44, 45, 49, 50, 52, 53, 55, 56, 58, 59, 61, 62 DIF & DIF# [18:17] OUT 65 - 68 0.7VDifferentialclockoutputs,whichcanbeconfiguredtobe1:1insteadofgeared.Default isgearedsameas0-9outputs. OE_[16:5]# IN 21, 24, 29, 32, 37, 40, 43, 3.3VLVTTLactiveLOWinputforenablingcorrespondingdifferentialoutputclock.Clocks 48, 51, 54, 57, 60 also can be disabled via SMBus registers OE _17_18# IN 69 3.3VLVTTLactivelowinputforenablingboth DIF10and11differentialoutputclocks.Clocks also can be disabled via SMBus registers individually. OE_01234# IN 18 3.3VLVTTLinput HIGH_BW# IN 4 3.3 V LVTTL input for selecting the PLL bandwidth. 0 = HIGH BW, 1 = LOW BW. SCL IN 19 SMBus slave clock input SDA I/O, OC 20 Open collector SMBus data IREF IN 1 Aprecisionresistorisattachedtothispintosetthedifferentialoutputcurrent SA_[1:0] IN 35, 36 3.3V LVTTL input selecting the address. SA_[2:0] set device SMBus address. SA_2/PLL_BYPASS# IN 72 3.3 V LVTTL input for PLLbypass and SMBus address FS_A IN 5 3.3VLVTTLinputtoestablishaHIGH(>200Mhz)orLOWfrequency(<200Mhz)range PD# IN 3 3.3 V LVTTL input to power up or power down the device (see PD Functionality table). OE FUNCTIONALITY OE# - Pin OE# - SMBus bit DIF DIFF]# 0 1 Normal Normal 0 0 Tristate Tristate 1 1 Tristate Tristate 1 0 Tristate Tristate Symbol Description Min. Max. Unit VDDA 3.3V Core Supply Voltage 4.6 V VDDIN 3.3V Logic Input Supply Voltage GND - 0.5 4.6 V TSTG Storage Temperature –65 +150 °C TAMBIENT Ambient Operating Temperature 0 +70 °C TCASE Case Temperature +115 °C ESD Prot Input ESD Protection 2000 V Human Body Model ABSOLUTE MAXIMUM RATINGS(1) NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. PD FUNCTIONALITY Inputs Outputs PD# / VDDA CLK_IN / CLK_IN# DIF DIF# PLL State 3.3V (Nom) Running Running ON GND X Hi-Z OFF |
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