ZSSC4151C Datasheet

© 2022 Renesas Electronics Corporation

20

March 25, 2020

8.1.1 Timing Definitions

The relevant timing parameters are listed in Table 7.

Table 7.

Timing Parameters

Symbol

Parameter

Description

OUR

Output update rate

Internal update rate of the main signal data.

ORT

Output response time

Latency from the main signal event to the completion of the AOUT transmission of this signal event.

DTI

Diagnostic testing interval

Rate of fault check processing.

FMT

Fault messaging time

Latency from the fault event to the completion of the AOUT transmission of the fault message.

8.2 Diagnostic Output

ZSSC4151C provides various failsafe tasks to control the proper function of the device and the connected sensor element. When a fault is

detected, a diagnostic output at the AOUT pin is activated if configured for this failsafe task. OWI Rx is enabled to make one-wire communication

possible for reading out the failure status information. Diagnostic output means setting the analog output potential to a level in the lower

diagnostic range (LDR) or in the upper diagnostic range (UDR). LDR and UDR levels are determined either by the external circuitry or are

configured in the ZSSC4151C NVM.

Detected failures are messaged at AOUT pin by the following:



UDR for ground loss (external load resistance connected to the external supply),

LDR for ground loss (external load resistance connected to the external ground)



UDR for supply loss (external load resistance connected to the external supply),

LDR for supply loss (external load resistance connected to the external ground)



LDR for oscillator fail



LDR for NVM CRC failure and for all hardware faults until NVM content is evaluated after power-on



LDR or UDR for all other detected faults according to the configuration in the NVM

8.3 Over-Voltage, Reverse-Polarity, and Short-Circuit Protection

ZSSC4151C is designed for a 5V supply provided by an electronic control unit (ECU).

ZSSC4151C and the connected resistive sensor element are protected from over-voltage and reverse-polarity damage by an internal supply

voltage limiter. The analog output AOUT is protected regarding short circuit, over-voltage, and reverse polarity with all potentials in the protection

range under all potential conditions at the VDDE and VSSE pins. These functions are described in detail in the ZSSC4151C Technical Note –

Power Management.

ZSSC4151C protection applies when the device is operated in the application circuits shown in section 9. The protection voltage is ±40V as

defined in the absolute maximum ratings (see Table 2). When the over-voltage protection is active, the device has a higher power dissipation.

Depending on the ambient temperature and on the external sensor characteristics, the higher power dissipation of the device could lead to a

violation of the maximum junction temperature.