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AT75C Datasheet(PDF) 5 Page - ATMEL Corporation

Part # AT75C
Description  Smart Internet Appliance Processor (SIAP)
PDF  171 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT75C Datasheet(HTML) 5 Page - ATMEL Corporation

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AT75C DSP Subsystem
1368C–INTAP–08/02
Bus Architecture
Data Buses
Data is transferred via the X-data bus (XDB) and the program data bus (PDB), 16-bit bi-
directional buses, and the Y-data bus (YDB), a 16-bit unidirectional bus. The XDB is the
main data bus, where most of the data transfers occur. Data transfer between the Y-
data memory (Y-RAM) and the multiplier (Y-register) occurs over the YDB when a multi-
ply instruction uses two data memory locations simultaneously. Instruction word fetches
take place in parallel over PDB.
The bus structure supports the following movements:
•
Register to register
•
Register to memory
•
Memory to register
•
Program to data
•
Program to register
•
Data to program
The bus structure can transfer up to two 16-bit words within one cycle.
Address Buses
Addresses are specified for the on-core X- and Y-RAM on the 16-bit unidirectional X-
address bus (XAB) and the 11-bit unidirectional Y-address bus (YAB). Program memory
addresses are specified on the 16-bit unidirectional program address bus (PAB).



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