AT75C datasheet(6/171 Pages) ATMEL

6 / 171 page

AT75C DSP Subsystem

1368C–INTAP–08/02

Computation and

Bit-manipulation Unit

The computation and bit-manipulation unit (CBU) contains two main units, the computa-

tion unit (CU) and the bit-manipulation unit (BMU). The saturation unit is shared by the

CU and the BMU units. A detailed block diagram of the computation and bit-manipula-

tion unit is shown below in Figure 3.

Figure 3. Computation Unit and Bit-manipulation Unit Block Diagram

Computation Unit

The computation unit (CU) consists of the multiplier unit, the ALU and two 36-bit accu-

mulator registers (A0 and A1), as shown in Figure 3.

Multiplier Unit

The multiplier unit consists of a 16-by-16 to 32-bit parallel 2’s complement, single-cycle,

non-pipelined multiplier, two 16-bit input registers (X and Y), a 32-bit output register (P),

and a product output shifter. The multiplier performs signed-by-signed, signed-by-

unsigned or unsigned-by-unsigned multiplication. Together with the ALU, the OakDSP-

Core can perform a single-cycle multiply-accumulate (MAC) instruction. The register P

is updated only after a multiply instruction and not after a change in the input registers.

The X- and Y-registers are read or written via the XDB, and the Y-register is written via

YDB, as 16-bit operands. The 16-bit Most Significant Portion (MSP) of the P register,

PH, can be written by the XDB as an operand. This enables a single-cycle restore of PH

during interrupt service routine. The complete 32-bit P register, sign-extended into 36

bits and shifted by the output shifter, can be used only by the ALU and can be moved

only to the A0 and A1 accumulators.

The X- and Y-registers can be also used as general-purpose temporary data registers.

ALU

Align

EXP

Barrel

Shifter

B0/B1

A0/A1

MUX

BFO

Multiplier

Shifter

Saturation Unit

XDB

YDB

AT75C Datasheet(PDF) 6 Page - ATMEL Corporation