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LM3880 Datasheet(PDF) 14 Page - National Semiconductor (TI) |
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LM3880 Datasheet(HTML) 14 Page - National Semiconductor (TI) |
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14 / 20 page ![]() Current Limiting A current limit feature allows the LM3686 to protect itself and external components during overload conditions. PWM mode implements current limiting using an internal comparator that trips at 1220mA (typ). If the output is shorted to ground the device enters a timed current limit mode where the NFET is turned on for a longer duration until the inductor current falls below a low threshold. This allows the inductor current more time to decay, thereby preventing runaway. PFM Operation At very light load, the DC-DC converter enters PFM mode and operates with reduced switching frequency and supply cur- rent to maintain high efficiency. The part automatically tran- sitions into PFM mode when either of two conditions occurs for a duration of 32 or more clock cycles: A. The NFET current reaches zero. B. The peak PMOS switch current drops below the I MODE lev- el, (typically I MODE < 75 mA + VBATT / 55Ω ). 30025510 FIGURE 5. Typical PFM Operation During PFM operation, the DC-DC converter positions the output voltage slightly higher than the nominal output voltage during PWM operation, allowing additional headroom for volt- age drop during a load transient from light to heavy load. The PFM comparators sense the output voltage via the feedback pin and control the switching of the output FETs such that the output voltage ramps between ~0.2% and ~1.8% above the nominal PWM output voltage. If the output voltage is below the ‘high’ PFM comparator threshold, the PMOS power switch is turned on. It remains on until the output voltage reaches the ‘high’ PFM threshold or the peak current exceeds the I PFM level set for PFM mode. The typical peak current in PFM mode is: I PFM = 112 mA + VBATT / 20Ω. Once the PMOS power switch is turned off, the NMOS power switch is turned on until the inductor current ramps to zero. When the NMOS zero-current condition is detected, the NMOS power switch is turned off. If the output voltage is be- low the ‘high’ PFM comparator threshold (see Figure 6), the PMOS switch is again turned on and the cycle is repeated until the output reaches the desired level. Once the output reaches the ‘high’ PFM threshold, the NMOS switch is turned on briefly to ramp the inductor current to zero and then both output switches are turned off and the part enters an ex- tremely low power mode. Quiescent supply current during this ‘sleep’ mode is 28µA (typ), which allows the part to achieve high efficiency under extremely light load conditions. If the load current should increase during PFM mode (see Figure 6) causing the output voltage to fall below the ‘low2’ PFM threshold, the part will automatically transition into fixed- frequency PWM mode. When V BATT = 2.7V the part transitions from PWM to PFM mode at ~35 mA output current and from PFM to PWM mode at ~95 mA , when V BATT= 3.6V, PWM to PFM transition hap- pens at ~42 mA and PFM to PWM transition happens at ~115 mA, when V BATT = 4.5V, PWM to PFM transition happens at ~60 mA and PFM to PWM transition happens at ~135 mA. 30025526 FIGURE 6. Operation in PFM Mode and Transfer to PWM Mode www.national.com 14 |
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