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TMPR4955AF Datasheet(PDF) 73 Page - Toshiba Semiconductor

Part # TMPR4955AF
Description  64-Bit TX System RISC TX49 Family
PDF  168 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4955AF Datasheet(HTML) 73 Page - Toshiba Semiconductor

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Chapter 6 TX4955A System Interface
6-1
Chapter 6. TX4955A System Interface
6.1
Terminology
The following terms are used in this section.
•
External agent: Logic device that is directly connected to the processor via the system
interface so a processor can issue (instructions).
•
System event: Event issued inside a processor which, when generated, means that
access to external system resources is required.
•
Sequence: Strict order of requests that the processor generates in order to provide
service for system events.
•
Protocol: Shift of signals for each cycle generated on the system interface so processor
requests or external requests can be asserted.
•
Syntax: Strict definition of the bit pattern on the encoded bus (command bus, etc.).
6.2
Explanation of System Interface of R5000 type protocol mode
In TX4955A, it is built in system interface function corresponding to TX4300 type protocol. A
selection of above-mentioned R5000 type protocol mode or TX4300 type protocol mode increases
by external pin (MODE43* : 117 pin).
MODE43* = 0: TX4300 type protocol
MODE43* = 1: R5000 type protocol
The TX4955A processor supports 32-bit address/data interfaces. This processor makes it
possible to construct a processor system by processors and main memory. System interfaces
consist of the following components:
•
32-bit address/data bus, SysAD
•
4-bit SysAD check bus, SysADC
•
9-bit command bus, SysCmd
•
1-bit SysCmd check parity, SysCmdP
•
6 handshake signals
– RdRdy*, WrRdy*
– ExtRqst*, Release*
– ValidIn*, ValidOut*
The TX4955A processor accesses external resources using the system interface in order to
correct cache misses, uncached operation, and other problems.



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