TMPR4955AF datasheet(96/168 Pages) TOSHIBA

96 / 168 page

Chapter 6 TX4955A System Interface

6-24

6.2.9

Data Transfer

The maximum data transfer rate of the system interface is 1 double word per cycle.

The external agent can select the data transfer rate to the processor. For example, it is

possible to transfer data and assert the ValidIn* signal just once for every

n cycles instead

of at all cycles. The external agent can transfer data to the processor at the selected

transfer rate.

The processor interprets cycles as being valid when the ValidIn* signal is asserted and

the SysCmd bus includes the data identifier. After a cycle has been interpreted as valid, the

processor continues to accept data until a data word with an indication that it is the final

data word appears.

6.2.9.1

Data transfer pattern

The term “data pattern” in the case of block write operations, refers to a string of

text that indicates the “data” cycles repeated so that the appropriate data transfer

speed can be obtained and the “unused” cycles. Dxx data patterns indicate a repetition

data transfer rate where there is one double word in three cycles followed by two

unused cycles. The data transfer rate is set by G2Sconfig register(0xF FF10 0000).

Table 6.2.5 indicates the data transfer rate, data pattern, and setting.

Table 6.2.5 Data Transfer Rate, Data Pattern and Setting at Block write requests

Maximum Data Transfer Rate

Data Pattern

Setting Bit0

1 double word/3 Master Clock cycle

Dxx

1 double word/1 Master Clock cycle

Note: The setting Bit0 is bit0 of the G2Sconfig register (0xF FF10 0000).

Bit0 is set to “0” when initialized.

6.2.9.2

Independent transfer on SysAD bus

A majority of applications connect the processor and external agent interior (both

directions), and register format transceivers together in a point-to-point manner via

the SysAD bus. The only two SysAD bus drives available for such applications are the

processor and the external agent.

Depending on the application, it may be necessary to make additional connections

on the SysAD bus for drivers and receivers to transfer data using the SysAD bus

without involving the processor. Such transfers are referred to as independent

transfers. In order to perform independent transfers, the external agent must use

arbitration handshake signals and external null requests to properly tune SysAD bus

control.

Independent transfer is performed on the SysAD bus according to the following

steps.

1. The external agent requests access to the SysAD bus in order to issue an external

request.

2. The processor releases the system interface and puts it in the slave state.

3. The external agent can independently transfer data using the SysAD bus.

However, the ValidIn* signal must be asserted during that transfer.

4. When transfer is complete, the external agent must issue a system interface

release null request and return the system interface to the master state.

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