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GL3590 Datasheet(PDF) 28 Page - GENESYS LOGIC |
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GL3590 Datasheet(HTML) 28 Page - GENESYS LOGIC |
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28 / 47 page ![]() GL3590 Datasheet © 2020 Genesys Logic, Inc. - All rights reserved. Page 28 GLI Confidential 4.2 GL3590-S Functional Block Upstream Port USB 2.0 USPORT Transceiver UTMI / SIE Control / Status Register Repeater RAM Power Control Logic DM & DP SS+ TX SS+ RX USB 3.1 USPORT Transceiver Power Management Engine Router / Aggregator Engine Control / Status Register USB 3.1 DSPORT Transceiver SS+ USB-C DFP SS+ TX & RX DM & DP DM & DP DM & DP ROM CPU SPI Engine SPI Flash PLL 25MHz SS+ TX & RX CDP Control Logic CDP Control Logic CDP Control Logic CDP Control Logic 3.3V Power 1.2V Power USB 3.1 DSPORT Transceiver USB 3.1 DSPORT Transceiver USB 3.1 DSPORT Transceiver USB 3.1 DSPORT Transceiver SS+ USB-C DFP SS+ USB-C DFP SS+ USB-C DFP SS+ USB-A DFP USB2.0 DFP USB2.0 DFP USB2.0 DFP USB 2.0 DSPORT transceiver USB 2.0 DSPORT transceiver USB 2.0 DSPORT transceiver USB 2.0 DSPORT transceiver USB 2.0 DSPORT transceiver USB 2.0 DSPORT transceiver USB 2.0 DSPORT transceiver USB 2.0 DSPORT Transceiver x8 DM & DP TT DM & DP DM & DP DM & DP DM & DP SS+ TX & RX SS+ TX & RX SS+ TX & RX TT TT TT TT TT TT TT x8 CC Controller CC Controller CC Controller CC Controller Figure 4.2 – GL3590-S Architecture Diagram |
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