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ST7789V2 Datasheet(PDF) 263 Page - Sitronix Technology Co., Ltd. |
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ST7789V2 Datasheet(HTML) 263 Page - Sitronix Technology Co., Ltd. |
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263 / 319 page  ST7789V2 Version 1.0 Page 263 of 319 2016/11 Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Sitronix. 9.2.2 RGBCTRL (B1h): RGB Interface Control B1H RGBCTRL (RGB Interface Control) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX RGBCTRL 0 ↑ 1 - 1 0 1 1 0 0 0 1 (B1h) 1st parameter 1 ↑ 1 - WO RCM1 RCM0 0 VSPL HSPL DPL EPL 2nd parameter 1 ↑ 1 - 0 VBP6 VBP5 VBP4 VBP3 VBP2 VBP1 VBP0 3rd parameter 1 ↑ 1 - 0 0 0 HBP4 HBP3 HBP2 HBP1 HBP0 Description WO: Direct RGB mode. WO Mode 0 Memory 1 Shift register RCM[1:0]: RGB I/F enable mode selection. RCM[1:0] Mode 00 MCU interface 01 10 RGB DE mode 11 RGB HV mode VSPL : Sets the signal polarity of the VSYNC pin. VSPL=”0”, Low active VSPL=”1”, High active HSPL : Sets the signal polarity of the HSYNC pin. HSPL=”0”, Low active HSPL=”1”, High active DPL : Sets the signal polarity of the DOTCLK pin. DPL = “0” The data is input on the positive edge of DOTCLK DPL = “1” The data is input on the negative edge of DOTCLK EPL : Sets the signal polarity of the ENABLE pin. EPL = “0” The data DB17-0 is written when ENABLE = “1”. Disable data write operation when ENABLE = “0”. EPL = “1” The data DB17-0 is written when ENABLE = “0”. Disable data write operation when ENABLE = “1”. VBP[6:0]: RGB interface Vsync back porch setting. Minimum setting is 0x02. HBP[4:0]: RGB interface Hsync back porch setting. Please refer to the section 8.9.3 for minimum setting. Register Availability |
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