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AD7765 Datasheet(PDF) 14 Page - Analog Devices

Part # AD7765
Description  24-Bit, 156 kSPS,112dB ADC, With On-Chip Buffers, Serial Interface
PDF  21 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7765 Datasheet(HTML) 14 Page - Analog Devices

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AD7765
Preliminary Technical Data
Rev. PrC | Page 14 of 21
DAISY CHAINING
Daisy chaining devices allows numerous devices to use the same
digital interface lines. This feature is especially useful for
reducing component count and wiring connections, e.g. in
isolated multi-converter applications or for systems with a
limited interfacing capacity. Data read-back is analogous to
clocking a shift register.
The block diagram in Figure 15 shows the way in which devices
must be connected in order to achieve daisy chain functionality.
Figure 15 shows four AD7765 devices daisy chained together
with a common MCLK signal applied, will work for both
decimate by 128 or 256 modes.
Reading Data in Daisychain Mode
The SDO line of AD7765 (A) provides the output data from the
chain of AD7765 converters. The last device in the chain
(AD7765(D) in Figure 15) will have its Serial Data In (SDI) pin
connected to ground. All the devices in the chain must use
common MCLK and SYNC signals.
To enable the daisy chain conversion process, apply a common
SYNC pulse to all devices (see synchronization of devices).
After applying a SYNC pulse to all the devices there is a delay of
TBD SCO periods before valid conversion data appears at the
output of the chain of devices. As shown in Figure 16 the first
conversion result is output from the device labeled AD7765(A).
This 32-bit conversion result is then followed by the conversion
results from the devices B,C and D respectively with all
conversion results output in an MSB first sequence. The signals
output from the daisy chain are the stream of conversion results
from the SDO pin of AD7765(A) and the FSO signal also
output by the first device in the chain (AD7765(A)).
The falling edge of FSO signals the MSB of the first conversion
output in the chain. FSO stays logic low throughout the 32 SCO
clock periods needed to output the AD7765(A) result and
thereafter goes logic high during the output of the conversion
results from the devices B,C, and D.
The maximum number of devices that can be daisy chained is
dependent on the decimation rate the user selects. The max
number of devices that can be daisy chained can be calculated
simply by dividing the chosen decimation rate by 32(the
number of bits that must be clocked out for each conversion).
Table 6 shows give the maximum number of chained devices for
each decimation rate.
Table 6 Maximum length of device chain for all decimation
rates
Decimation Rate
Maximum length of chain
x256
8
x128
4
MCLK
SDI
SDO
AD7765
(A)
(B)
(C)
(D)
SYNC
FSI
MCLK
MCLK
MCLK
SDO
MCLK
SDO
FSI
FSI
FSI
FSI
SDI
SDI
SDI
SDI
SYNC
SYNC
SYNC
AD7765
AD7765
AD7765
SDO
SYNC
FSO
Figure 15. Daisy Chaining 4xAD7765 devices in decimate by 128 mode using a 40Mhz MCLK signal.
AD7765 (A)
32-Bit O/P
AD7765 (B)
AD7765 (C)
AD7765 (D)
AD7765 (C)
AD7765 (D)
AD7765 (D)
AD7765 (C)
AD7765 (D)
AD7765 (B)
AD7765 (C)
AD7765 (D)
AD7765 (B)
AD7765 (C)
AD7765 (D)
AD7765 (A)
AD7765 (B)
32-Bit O/P
32-Bit O/P
32-Bit O/P
32-Bit O/P
32-Bit O/P
SCO
FSO (A)
SDO (A)
SDI (A) = SDO (B)
SDI (B) = SDO (C)
SDI (C) = SDO (D)
32 x tSCO
32 x tSCO
32 x tSCO
32 x tSCO
Figure 16. Daisychain mode, Data read timing diagram (for daisychain configuration shown in Figure 15).



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