P87LPC778FDH datasheet(22/79 Pages) PHILIPS

22 / 79 page

Philips Semiconductors

P87LPC778

CMOS single-chip 8-bit microcontroller

Product data

Rev. 01 — 31 March 2004

22 of 79

9397 750 12378

The width of each PWM output pulse is determined by the value in the appropriate

compare shadow registers, CPSW0 through CPSW4, CPSW0–3 for bits 0–7 and

CPSW4 for bits 8 and 9. When the counter described above reaches underﬂow the

PWM output is forced high. It remains high until the compare value is reached at

which point it goes low until the next underﬂow. The number of microcontroller clock

pulses that the PWM n output is high is given by:

A compare value greater than the counter reload value results in the PWM output

being permanently high. In addition there are two special cases. A compare value of

all zeroes, 000, causes the output to remain permanently high. A compare value of all

ones, 3FF, results in the PWM output remaining permanently low. Again the compare

value is loaded into a shadow register. The transfer from this holding register to the

actual compare register is under program control. The register assignments are

shown below where the number immediately following ‘CPSW’ identiﬁes the PWM

output. Thus CPSW0 controls the width of PWM0, CPSW1 the width of PWM1 etc. In

Fig 8.

PWM block diagram.

002aaa619

INTERNAL BUS

10-BIT SHADOW

10-BIT COUNTER

XFER

RUN

BRAKE

BRAKE CONTROL LOGIC

10-BIT SHADOW

10-BIT COMPARE

A>B

10-BIT SHADOW

10-BIT COMPARE

A>B

10-BIT SHADOW

10-BIT COMPARE

A>B

10-BIT SHADOW

10-BIT COMPARE

A>B

BKCH

BKPS

BPEN

BKEN

PWM3B

2:1 MUX

PWM3

PWM2

PWM1

PWM0

PWM3I

PWM2B

2:1 MUX

PWM2I

PWM1B

2:1 MUX

PWM1I

PWM0B

2:1 MUX

PWM0I

CNSW

CPSWn

–

()

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