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P87LPC778FDH Datasheet(PDF) 23 Page - NXP Semiconductors |
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P87LPC778FDH Datasheet(HTML) 23 Page - NXP Semiconductors |
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23 / 79 page ![]() Philips Semiconductors P87LPC778 CMOS single-chip 8-bit microcontroller Product data Rev. 01 — 31 March 2004 23 of 79 9397 750 12378 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. the case of two digits following ‘CPSW,’ e.g. CPSW0.0, the second digit refers to the bit of the compare value. Thus CPSW0.0 represents the value loaded into bit 0 of the PWM0 compare register. The overall functioning of the PWM module is controlled by the contents of the PWMCON0 register. The operation of most of the control bits is straightforward. For example there is an invert bit for each output which causes results in the output to have the opposite value compared to its non-inverted output. The transfer of the data from the shadow registers to the control registers is controlled by the Transfer bit; PWMCON0.6, the actual transfer will happen on the first underflow after the transfer bit is set. The user can monitor when underflow causes the transfer to occur by monitoring the Transfer bit; PWCON0.6. When the transfer takes place the PWM logic automatically resets this bit. The Run bit; PWMCON0.7 allows the counter of the PWM to be either in the run or idle state. The fact that the transfer from the shadow to the working registers only occurs when there is an underflow in the counter results in the need for the user’s program to observe the following precautions. Table 13: CPSW0 - Compare shadow register 0 (address 0D3H) bit allocation Bit addressable; Reset value: 00H Bit 7 6 5 4 3 2 1 0 Symbol CPSW07 CPSW06 CPSW05 CPSW04 CPSW03 CPSW02 CPSW01 CPSW00 Table 14: CPSW1 - Compare shadow register 1 (address 0D4H) bit allocation Bit addressable; Reset value: 00H Bit 7 6 5 4 3 2 1 0 Symbol CPSW17 CPSW16 CPSW15 CPSW14 CPSW13 CPSW12 CPSW11 CPSW10 Table 15: CPSW2 - Compare shadow register 2 (address 0D5H) bit allocation Bit addressable; Reset value: 00H Bit 7 6 5 4 3 2 1 0 Symbol CPSW27 CPSW26 CPSW25 CPSW24 CPSW23 CPSW22 CPSW21 CPSW20 Table 16: CPSW3 - Compare shadow register 3 (address 0D6H) bit allocation Bit addressable; Reset value: 00H Bit 7 6 5 4 3 2 1 0 Symbol CPSW37 CPSW36 CPSW35 CPSW34 CPSW33 CPSW32 CPSW31 CPSW30 Table 17: CPSW4 - Compare shadow register 4 (address 0D7H) bit allocation Bit addressable; Reset value: 00H Bit 7 6 5 4 3 2 1 0 Symbol CPSW39 CPSW38 CPSW29 CPSW28 CPSW19 CPSW18 CPSW09 CPSW08 |
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