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PCK9448 Datasheet(PDF) 12 Page - NXP Semiconductors

Part # PCK9448
Description  3.3 V/2.5 V LVCMOS 1 : 12 clock fan-out buffer
PDF  20 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

PCK9448 Datasheet(HTML) 12 Page - NXP Semiconductors

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9397 750 12534
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 29 November 2005
12 of 20
Philips Semiconductors
PCK9448
3.3 V/2.5 V LVCMOS 1 : 12 clock fan-out buffer
9.2 Power consumption of the PCK9448 and thermal management
The PCK9448 dynamic electrical (AC) specification is guaranteed for the entire operating
frequency range up to 350 MHz. The PCK9448 power consumption and the associated
long-term reliability may decrease the maximum frequency limit, depending on operating
condition such as clock frequency, supply voltage, output loading, ambient temperature,
vertical convection and thermal conductivity of package and board. This section describes
the impact of these parameters on the junction temperature and gives a guideline to
estimate the PCK9448 die junction temperature and the associated device reliability. The
long-term device reliability is a function of the die temperature; refer to Table 10.
Increased power consumption will increase the die junctIon temperature and impact the
device reliability (MTBF). According to the system-defined tolerable MTBF, the die junction
temperature of the PCK9448 needs to be controlled and the thermal impedance of the
board/package should be optimized. The power dissipated in the PCK9448 is represented
in Equation 1.
(1)
Where Iq(max) is the static current consumption of the PCK9448, CPD is the power
dissipation capacitance per output, (M)
ΣC
L represents the external capacitive output load,
N is the number of active outputs (N is always 12 in the case of the PCK9448). The
PCK9448 supports driving transmission lines to maintain high signal integrity and tight
timing parameters. Any transmission line will hide the limped capacitive load at the end of
the board trace, therefore,
ΣC
L is zero for controlled transmission line systems and can be
eliminated from Equation 1. Using parallel termination output termination results in
Equation 2 for power dissipation.
Fig 14. Optimized dual line termination
Zo = 50 Ω
002aaa723
Rs = 16 Ω
Zo = 50 Ω
Rs = 16 Ω
PCK9448
OUTPUT
BUFFER
17
Ω
IN
Zo = 50 Ω
Ro
17
Ω 16 Ω 16 Ω
||
+
50
Ω 50 Ω
||
=
25
Ω
25
Ω
=
Table 10:
Die junction temperature and MTBF
Junction temperature (
°C)
MTBF (years)
100
20.4
110
9.1
120
4.2
130
2.0
P
tot
I
q max
()
V
CC
f
clk
×
+
NC
PD
C
L
M
∑
+
×


×
V
CC
×
=



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