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AD8382 Datasheet(PDF) 16 Page - Analog Devices

Part # AD8382
Description  High Performance 12-Bit, 6-Channel Output, Decimating LCD DecDriver
PDF  24 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD8382 Datasheet(HTML) 16 Page - Analog Devices

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AD8382
Ch 0
Ch 2
Ch 4
Ch 6
Ch 8
Ch 10
CH 1
CH 3
CH 5
CH 7
CH 9
CH 11
12 – CHANNEL
LCD
AD8382
DB(0:11)
CLK
XFR
STSQ
INV
VID0
VID1
VID2
VID3
VID4
VID5
E/O
R/L
VREFHI
VREFLO
V2
V1
AD8382
DB(0:11)
CLK
XFR
STSQ
INV
VID0
VID1
VID2
VID3
VID4
VID5
E/O
R/L
VREFHI
VREFLO
V2
V1
REFERENCES
VREFHI
VREFLO
V2
V1
DB1(0:11)
CLK
XFR
STSQ1
STSQ2
INV1
INV2
E/O1
E/O2
R/L
INV1
INV2
IMAGE PROCESSOR
Pixel CLK
CLK
CLK
CLK
CLK
STSQ1
STSQ2
÷6 COUNTER
÷6 COUNTER
HSTART
÷2
H. REVERSE
HSYNC
VSYNC
Figure 40. Single Data Bus 12-Channel Even/Odd System Block Diagram
Ch 0
Ch 2
Ch 4
Ch 6
Ch 8
Ch 10
CH 1
CH 3
CH 5
CH 7
CH 9
CH 11
12 – CHANNEL
LCD
AD8382
DB(0:11)
CLK
XFR
STSQ
INV
VID0
VID1
VID2
VID3
VID4
VID5
E/O
R/L
VREFHI
VREFLO
V2
V1
AD8382
DB(0:11)
CLK
XFR
STSQ
INV
VID0
VID1
VID2
VID3
VID4
VID5
E/O
R/L
VREFHI
VREFLO
V2
V1
REFERENCES
VREFHI
VREFLO
V2
V1
DB1(0:11)
CLK
XFR
STSQ
INV1
INV2
E/O
R/L
DB2(0:11)
INV1
INV2
D(0:9) Odd
D(0:9) Even
IMAGE PROCESSOR
D(0:9) Even
D(0:9) Odd
Pixel CLK
÷6 COUNTER
CLK
HSTART
÷2
“1”
H. REVERSE
HSYNC
VSYNC
Figure 41. Dual Data Bus 12-Channel Even/Odd System Block Diagram
Rev. 0 | Page 16 of 24



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