 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
CDB42406 Datasheet(PDF) 13 Page - Cirrus Logic |
|
|
|||||||||||||||||||||||||||||
CDB42406 Datasheet(HTML) 13 Page - Cirrus Logic |
|
|
13 / 32 page  CDB42406 13 1.7.3e Setup 11 Using the on-board crystal oscillator, AUDIO MCLK, a DSP connected to DSP I/O HDR masters the subclocks for the DAC and provides data to the DAC. Using the on-board crystal oscillator, AUDIO MCLK, the CS42406 ADC masters its subclocks and are output onto DSP_ADC_LRCK and DSP_ADC_SCLK. The subclocks for the DAC are input via DSP_DAC_LRCK and DSP_DAC_SCLK. This allows independent control of the sample rate for the ADC and DAC. For implementation of this setup option, set DIP switch S4 (SW[3:0]) to ‘1011’b. AUDIO MCLK MC LK DA C_LRCK/ DA C _S CL K AD C_ LR CK / AD C_ SC LK DA C _S DIN x AD C_ SD OU T CS 42406 DSP I/O HDR DSP_MC LK DS P_ A DC_LRCK/ DSP_AD C_ SC LK DSP_SDO UT DS P_ DA C_LRCK/ DSP_D A C_ SC LK DS P_ S DINx CS 8406 CS 8416 RM CK OM CK OL RC K / OS CL K SDO UT OM C K ILRCK/ ISC LK SD IN Figure 12. DSP Routing - Setup 11 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
