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TLV709 Datasheet(PDF) 14 Page - Texas Instruments |
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TLV709 Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 31 page ![]() 8.2.2 Detailed Design Procedure 8.2.2.1 Setting VOUT for the TLV70901 Adjustable LDO As illustrated in Figure 8-2, the TLV709 contains an adjustable version (the TLV70901) that sets the output voltage using an external resistor divider. The output voltage operating range is 1.2 V to 28 V, and is calculated using: OUT REF R1 V V 1 R2 æ ö = ´ + ç ÷ è ø (2) where: • VREF = 1.205 V (typical) Choose resistors R1 and R2 to allow approximately 1.5 μA of current through the resistor divider. Lower value resistors can be used for improved noise performance, but consume more power. Avoid higher resistor values because leakage current into or out of FB across R1 / R2 creates an offset voltage that is proportional to VOUT divided by VREF. The recommended design procedure is to choose R2 = 1 MΩ to set the divider current at 1.5 μA, and then calculate R1 using Equation 3: R1 = VOUTVREF − 1 ×R2 (3) Figure 8-2 depicts this configuration. 8.2.2.2 External Capacitor Requirements The device is designed to be stable using low equivalent series resistance (ESR) ceramic capacitors at the input and output. Multilayer ceramic capacitors have become the industry standard for these types of applications and are recommended, but must be used with good judgment. Ceramic capacitors that employ X7R-, X5R-, and C0G-rated dielectric materials provide relatively good capacitive stability across temperature, whereas the use of Y5V-rated capacitors is discouraged because of large variations in capacitance. Regardless of the ceramic capacitor type selected, the effective capacitance varies with operating voltage and temperature. Generally, expect the effective capacitance to decrease by as much as 50%. The input and output capacitors listed in the Recommended Operating Conditions table account for an effective capacitance of approximately 50% of the nominal value. 8.2.2.3 Input and Output Capacitor Requirements Although an input capacitor is not required for stability, good analog design practice is to connect a capacitor from IN to GND. This capacitor counteracts reactive input sources and improves transient response, input ripple, and PSRR. Use an input capacitor if the source impedance is more than 0.5 Ω. A higher value capacitor can be necessary if large, fast rise-time load or line transients are anticipated or if the device is located several inches from the input power source. Dynamic performance of the device is improved by using a larger output capacitor. The TLV709 requires an output capacitor of 1 μF or larger (0.47 μF or larger capacitance) for stability and an equivalent series resistance (ESR) between 0.001 Ω and 1 Ω. For best transient performance, use X5R- and X7R-type ceramic capacitors because these capacitors have minimal variation in value and ESR over temperature. When choosing a capacitor for a specific application, be mindful of the DC bias characteristics for the capacitor. Higher output voltages cause a significant derating of the capacitor. Use an output capacitor within the range specified in the Recommended Operating Conditions table for stability. TLV709 SLVSGU2B – FEBRUARY 2023 – REVISED JUNE 2023 www.ti.com 14 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TLV709 |
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