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CS5535 Datasheet(PDF) 405 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # CS5535
Description  Geode??CS5535 I/O Companion Multi-Function South Bridge
PDF  555 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

CS5535 Datasheet(HTML) 405 Page - National Semiconductor (TI)

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405
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DMA Register Descriptions (Continued)
5.13.1.3
DMA Shadow Mask (DMA_MSK_SHDW)
5.13.2 DMA Native Registers
5.13.2.1
These registers reside in the I/O address space.Slave DMA Channel [3:0] Memory Address
(DMA_CH[x]_ADDR_BYTE)
Slave DMA Channel 0 Memory Address
(DMA_CH0_ADDR_BYTE)
Slave DMA Channel 1 Memory Address
(DMA_CH1_ADDR_BYTE)
Slave DMA Channel 2 Memory Address
(DMA_CH2_ADDR_BYTE)
Slave DMA Channel 3 Memory Address
(DMA_CH3_ADDR_BYTE)
MSR Address
51400049h
Type
RO
Reset Value
00FFh
DMA__MSK_SHDW Register Map
15
14
13
12
11
10
987
6543
210
RSVD
CH7
MASK
CH6
MASK
CH5
MASK
CH4
MASK
CH3
MASK
CH2
MASK
CH1
MASK
CH0
MASK
DMA__MSK_SHDW Bit Descriptions
Bit
Name
Description
15:8
Reserved
Reserved. Reads as 00h.
7
CH7MASK
Channel 7 Mask Reflects value of Channel 7 Mask bit. 0: Not masked; 1: Masked.
6
CH6MASK
Channel 6 Mask. Reflects value of Channel 6 Mask bit. 0: Not masked; 1: Masked.
5
CH5MASK
Channel 5 Mask. Reflects value of Channel 5 Mask bit. 0: Not masked; 1: Masked.
4
CH4MASK
Channel 4 Mask. Reflects value of Channel 4 Mask bit. 0: Not masked; 1: Masked.
3
CH3MASK
Channel 3 Mask. Reflects value of Channel 3 Mask bit. 0: Not masked; 1: Masked.
2
CH2MASK
Channel 2 Mask. Reflects value of Channel 2 Mask bit. 0: Not masked; 1: Masked.
1
CH1MASK
Channel 1 Mask. Reflects value of Channel 1 Mask bit. 0: Not masked; 1: Masked.
0
CH0MASK
Channel 0 Mask. Reflects value of Channel 0 Mask bit. 0: Not masked; 1: Masked.
I/O Address
000h
Type
R/W
Reset Value
xxh
I/O Address
002h
Type
R/W
Reset Value
xxh
I/O Address
004h
Type
R/W
Reset Value
xxh
I/O Address
006h
Type
R/W
Reset Value
xxh
DMA_CH[x]_ADDR_BYTE Register Map
76543
210
DMA_CH_ADDR_BYTE
DMA_CH[x]_ADDR_BYTE Bit Descriptions
Bit
Name
Description
7:0
DMA_CH_ADDR_BYTE
DMA Channel Address. Read/write in two successive bus cycles, low byte first.



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