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CS5535 Datasheet(PDF) 496 Page - National Semiconductor (TI) |
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CS5535 Datasheet(HTML) 496 Page - National Semiconductor (TI) |
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496 / 555 page ![]() www.national.com 496 Revision 0.8 PMC Register Descriptions (Continued) 5.18.3.15 PM Thermal-Safe Delay and Enable (PM_TSD) Reads always return the value written, except for RSVD bits [29:20]. PM_FSD Register Map 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9876543210 RSVD PWRBUT_DELAY PM_FSD Bit Descriptions Bit Name Description 31 PWRBUT_LOCK Power Button Lock. After this bit is set, the value in this register can not be changed until RESET_STAND# is applied. 30 PWRBUT_EN Power Button Enable. Must be high to enable the fail-safe function. 29:20 RSVD Reserved. By convention write 0, but may write anything. Reads return 0. 19:0 PWRBUT_DELAY Power Button Delay. If the Power Button (PWR_BUT#) input signal is asserted for PWRBUT_DELAY number of 32 kHz clock edges, then unconditionally de-assert WORKING and WORK_AUX to remove Working power. If PWR_BUT# is still asserted at wakeup, hold in Standby state until de-asserted. PWR_BUT# needs to be asserted for at least one 32 kHz clock edge for this function to work properly. A less than one 32 kHz clock edge pulse on PWR_BUT# may not be registered. The delay restarts if PWR_BUT# de-asserts and then asserts again. If PWR_BUT# is already asserted, the delay restarts anytime PWRBUT_DELAY (this field) is written. PMS I/O Offset 44h Type R/W Reset Value 00000000h PM_TSD Register Map 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9876543210 RSVD THRM_DELAY PM_TSD Bit Descriptions Bit Name Description 31 THRM_LOCK Thermal Lock. After this bit is set, the value in this register can not be changed until RESET_STAND# is applied. 30 THRM_EN Thermal Enable. Must be high to enable the thermal alarm function. 29:20 RSVD Reserved. By convention write 0, but may write anything. Reads return 0 value. |
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