CS5535 datasheet(499/555 Pages) NSC

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PMC Register Descriptions (Continued)

5.18.3.18 PM Abnormal Work Delay and Enable (PM_AWKD)

Reads always return the value written, except for RSVD bits [29:20]. This register applies to Abnormal Standby state entry.

5.18.3.19 PM Standby Status and Control (PM_SSC)

PMS I/O Offset

50h

Type

R/W

Reset Value

00000000h

PM_AWKD Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9876543210

RSVD

AWKD_DELAY

PM_AWKD Bit Descriptions

Bit

Name

Description

AWKD_LOCK

Abnormal Work Delay Lock. After this bit is set, the value in this register can not be

changed until RESET_STAND# is applied.

AWKD_EN

Abnormal Work Delay Enable. Must be high to enable this function.

29:20

RSVD

Reserved. By convention write 0, but may write anything. Reads return 0.

19:0

AWKD_DELAY

Abnormal Work Delay Delay. If the standby state is entered abnormally,

AWKD_DELAY number of 32 kHz clock edges must pass before the Working state

is allowed to be entered again, that is, a Standby Wakeup recognized.

PMS I/O Offset

54h

Type

R/W

Reset Value

00000001h

PM_SSC Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9876543210

RSVD

PM_SSC Bit Descriptions

Bit

Name

Description

31:19

RSVD

Reserved. Reads return 0; writes are don’t care.

PI (RO)

Power Immediate (Read Only). Reads return current value of Power Immediate bit.

CLEAR_PI

Clear Power Immediate. Write 1 to clear the read only Power Immediate bit (bit 18).

Writing 0 has no effect. Reads return 0.

SET_PI

Set Power Immediate. Write 1 to set the read only Power Immediate bit (bit 18). Writ-

ing 0 has no effect. Reads return 0.

CS5535 Datasheet(PDF) 499 Page - National Semiconductor (TI)

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