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CS5535 Datasheet(PDF) 511 Page - National Semiconductor (TI) |
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CS5535 Datasheet(HTML) 511 Page - National Semiconductor (TI) |
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511 / 555 page ![]() Revision 0.8 511 www.national.com Flash Controller Register Descriptions (Continued) NAND ECC MSB Line Parity (NAND_ECC_MSB) NAND ECC Column Parity (NAND_ECC_COL) 5.19.2.7 NAND Line Address Counter (NAND_LAC) Flash Memory Offset 812h Flash I/O Offset 0Ah Type R/W Reset Value FFh NAND_ECC_MSB Register Map 76543 210 LP[15:8] NAND_ECC_MSB Bit Descriptions Bit Name Description 7:0 LP[15:8] Line Parity Bits 15 through 8. Flash Memory Offset 813h Flash I/O Offset 0Bh Type R/W Reset Value FFh NAND_ECC_COL Register Map 76543 210 CP[5:0] RSVD NAND_ECC_COL Bit Descriptions Bit Name Description 7:2 CP[5:0] Column Parity Bits 5 through 0. 1:0 RSVD (RO) Reserved. Always returns 11 for odd ECC parity and 00 for even ECC parity. Flash Memory Offset 814h Flash I/O Offset 0Ch Type R/W Reset Value 00h NAND_LAC Register Map 76543 210 LAC |
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