MP7758

– 18V, 2x15W, STEREO BTL, INDUCTORLESS CLASS-D AUDIO AMPLIFIER

MP7758 Rev. 1.0

www.MonolithicPower.com

18

12/3/2020

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© 2020 MPS. All Rights Reserved.

Figure 6: EMI Test Data of the MP7758 Evaluation Board (8)

Note:

8)

Testing conditions: 10 meter EMI chamber, 1.2 meter twist speaker cable, MP7758 evaluation board stereo test. VDD = 12V, Load = 8

Ω

+ 66µH, POUT = 9.5W x 2, 1kHz signal.

PCB Layout Guidelines

Circuit layout is critical for optimal performance,

low output distortion, and noise. For the best

results, duplicate the evaluation board layout,

refer to Figure 7, and follow the guidelines

below:

1. Place the bootstrap capacitor (CBS) as close

to the BST and SW pins as possible. The

capacitor supplies the gate drive current to

the internal high-side MOSFET (HS-FET).

2. Place the power supply bypass capacitor

(CBYP) as close to the PVCC pins as

possible to prevent excessive output noise

and avoid overstressing the MP7758. The

capacitors carry the transient current for the

switching power stage.

3. Keep the magnetic bead capacitor filter

close to the magnetic bead. The filter

converts the pulse train at SW to the output

voltage that drives the speaker.

4. Ensure that any traces carrying the switch

node (SW) voltages are routed far from any

input signal traces. If the trace must run

near the SW trace near the input, shield the

input with a ground plane between the

traces. Physically separate each channel to

prevent crosstalk.

5. Route each power supply from the source to

each channel individually, and not serially.

This prevents channel-to-channel coupling

through the power supply input.