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MP86920 Datasheet(PDF) 3 Page - Monolithic Power Systems |
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MP86920 Datasheet(HTML) 3 Page - Monolithic Power Systems |
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3 / 15 page ![]() MP86920 – 16V, INTELLI-PHASETM SOLUTION IN LGA-27 (4mmx5mm) PACKAGE MP86920 Rev. 1.0 www.MonolithicPower.com 3 12/22/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description 1 TMON/FLT Single-pin temperature sense and fault reporting. 2, 23 AGND Analog ground. Connect AGND to the PGND plane at the VDD decoupling capacitor. 3 VDD 3.3V supply for internal circuitry. Decouple VDD with 1µF (or higher) ceramic capacitor connected to AGND. 4 VDRV Driver voltage. Connect VDRV to a 3.3V supply. Decouple this pin with a 1μF to 4.7μF ceramic capacitor. 5, 24, 27 NC No connection. 6, 7, 13, 14, 15, 26 PGND Power ground. Place multiple vias on the inner solid ground layers to minimize parasitic impedance and thermal resistance. 8, 9, 10, 11, 12 SW Switch output. 16, 17, 18 VIN Supply voltage. Place an input capacitor (CIN) on VIN. Place the capacitor close to the device to support the switching current and reduce voltage spikes at the input. 19 PHASE Switching node for bootstrap capacitor connection. The PHASE pin is internally connected to SW. 20 BST Bootstrap. BST requires a 0.1µF to 1µF capacitor to drive the power switch’s gate above the supply voltage. Connect the capacitor between the PHASE and BST pins to form a floating supply across the power switch driver. 21 PWM Pulse-width modulation input. Float the PWM pin or drive it to a middle-state voltage to enable diode emulation mode. 22 EN Enable. Pull EN low to disable the device and place SW in a high-impedance state. 25 CS Current-sense output. Connect an external resistor to the CS pin to adjust the voltage proportional to the inductor current. |
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