MP86920

– 16V, INTELLI-PHASETM SOLUTION IN LGA-27 (4mmx5mm) PACKAGE

MP86920 Rev. 1.0

www.MonolithicPower.com

10

12/22/2020

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© 2020 MPS. All Rights Reserved.

OPERATION

The MP86920 is a 20A, monolithic half-bridge

driver with MOSFETs. It is well-suited for multi-

phase buck regulators. When the VIN, VDD

signals are sufficiently high, operation begins.

PWM

The PWM input pin is capable of tri-state input.

When the PWM input signal is within the tri-

state threshold window for about 50ns (tHT or

tLT), the high-side MOSFET (HS-FET) turns off

immediately. The low-side MOSFET (LS-FET)

enters diode emulation mode, and stays on until

zero-current detection (ZCD).

The tri-state PWM input is enabled by forcing a

middle-voltage PWM signal, or by floating the

PWM input. The internal current source charges

the signal to a middle voltage. See the PWM

Timing Diagram on page 6 to define the

propagation delay from PWM to the SW node.

Diode Emulation Mode

When PWM is in tri-state input in diode

emulation mode, the LS-FET turns on when the

inductor current is positive. The LS-FET turns

off if the inductor current reaches 0A. Diode

emulation mode can be enabled by floating the

PWM pin or driving it to a middle state.

Positive and Negative Inductor Current Limit

If an over-current (OC) condition is detected on

the HS-FET for four consecutive cycles, the

HS-FET latches off, and TMON/FLT is pulled to

3.3V. The LS-FET turns on, and stays on until

ZCD. To release the latch and restart the

device, cycle the power on VIN or VDD, or

toggle EN.

If the LS-FET detects a -15A current, the part

turns off the LS-FET for 40ns to limit the

negative

current.

The

LS-

FET’s negative

current limit does not trigger a fault report.

Over-Temperature Protection (OTP)

If the junction temperature reaches the over-

temperature

(OT)

threshold,

the

HS-FET

latches off, and TMON/FLT is pulled to 3.3V.

The LS-FET turns on, and stays on until ZCD.

Temperature-Sense

Output

with

Fault

Indicator (TMON/FLT)

The TMON/FLT pin can sense the junction

temperature or indicate if certain faults have

occurred.

Junction Temperature Sense

When VDD exceeds its under-voltage lockout

(UVLO) threshold and the part is in active

mode, the TMON/FLT pin has an output voltage

that is proportional to the junction temperature.

The gain is 8mV/°C, and it has a 800mV offset

at 25°C (e.g. the voltage is 0.8V when TJ =

25°C, and 1.4V when TJ = 100°C).

Fault Function

If a fault occurs, the TMON/FLT pin is pulled to

VDD to report the fault, regardless of the

temperature. TMON/FLT monitors three fault

events, described below:

1. Over-current limit: The current limit fault

condition must remain for four consecutive

cycles to trigger this fault. If this fault occurs,

the part latches off to turn off the HS-FET.

The LS-FET turns on and stays on until the

current reaches 0A.

2. Over-temperature fault when TJ > 160°C: If

an over-temperature fault occurs, the part

latches off, and the HS-FET turns off. The

LS-FET turns on and stays on until the

current reaches 0A.

3. SW-to-PGND short: If a short fault occurs,

the part latches off to turn off the HS-FET.

The fault latch is not reset by entering standby

mode. The fault latch is released by cycling the

power on VIN or VDD.

Current Sense (CS)

The CS pin is a bidirectional current source that

is proportional to the inductor current. The

current-sense

gain is 10μA/A. If required, a

resistor can be used to configure the voltage

gain proportional to the inductor current

The CS voltage must range between 0.8V and

2.0V

to keep CS’s output current linearly

proportional to the inductor current. In general,

there is a resistor (RCS) connected from the CS

pin to an external voltage that is capable of