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UPD17708 Datasheet(PDF) 50 Page - Renesas Technology Corp |
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UPD17708 Datasheet(HTML) 50 Page - Renesas Technology Corp |
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50 / 358 page ![]() µPD17704, 17705, 17707, 17708, 17709 48 5.3.4 Cautions on Using Address Register Because the address register is configured in 16 bits, it can specify an address up to FFFFH. However, the program memory exists at addresses 0000H to 1FFFH in the case of µPD17704, 0000H to 2FFFH in the case of the µPD17705 and 17707 and 0000H to 3FFFH in the case of the µPD17708 and 17709. Therefore, the maximum value that can be set to the address register of the µPD17704 is address 1FFFH. In the case of the µPD17705 and 17707, it is address 2FFFH. In the case of the µPD17708 and 17709, it is address 3FFFH. 5.4 Window Register (WR) 5.4.1 Configuration of window register Figure 5-4 shows the configuration of the window register. As shown in the figure, the window register consists of 4 bits of system register address 78H (WR). Figure 5-4. Configuration of Window Register 5.4.2 Function of window register The window register is used to transfer data with the register file (RF) to be described later. Data transfer between the window register and register file is manipulated by using dedicated instructions “PEEK WR, rf” and “POKE, rf WR” (rf: address of register file). The following paragraphs (1) and (2) describe the operation of the window register when these instructions are executed. For further information, also refer to 8. REGISTER FILE (RF). (1) “PEEK WR, rf” instruction When this instruction is executed, the contents of the register file addressed by “rf” are transferred to the window register. (2) “POKE rf, WR” instruction When this instruction is executed, the contents of the window register are transferred to the register file addressed by “rf”. Address Name Symbol Bit Data Clock stop 78H Window register (WR) WR Undefined Retained b3 M S B b2 b1 b0 L S B Power-ON reset WDT&SP reset CE reset |
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