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UPD17708 Datasheet(PDF) 18 Page - Renesas Technology Corp |
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UPD17708 Datasheet(HTML) 18 Page - Renesas Technology Corp |
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18 / 358 page  µPD17704, 17705, 17707, 17708, 17709 16 1.2 Equivalent Circuits of Pins (1) P0A (P0A1/SCK0, P0A0/SO0) P0B (P0B3/SI0, P0B2/SCK1, P0B1/SO1, P0B0/SI1) P0C (P0C3, P0C2, P0C1, P0C0) P1D (P1D3, P1D2, P1D1/BEEP1, P1D0/BEEP0) P2A (P2A2, P2A1/FCG1, P2A0/FCG0) P2B (P2B3, P2B2, P2B1, P2B0) (I/O) P2C (P2C3, P2C2, P2C1, P2C0) P2D (P2D2, P2D1, P2D0) P3A (P3A3, P3A2, P3A1, P3A0) P3B (P3B3, P3B2, P3B1, P3B0) P3C (P3C3, P3C2, P3C1, P3C0) P3D (P3D3, P3D2, P3D1, P3D0) Note This is an internal signal that is output when the clock stop instruction is executed, and its circuit is designed not to increase the current consumption due to noise even if it is floated. VDD VDD CKSTOPNote |
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