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UPD17708 Datasheet(PDF) 131 Page - Renesas Technology Corp |
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UPD17708 Datasheet(HTML) 131 Page - Renesas Technology Corp |
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131 / 358 page  129 µPD17704, 17705, 17707, 17708, 17709 12.2.2 Function and configuration of interrupt request flag (IP ×××) Each interrupt request flag enables the interrupt of the corresponding peripheral hardware unit. In order for an interrupt to be accepted, all the following conditions must be satisfied. • The interrupt must be enabled by the corresponding interrupt request flag. • The interrupt request must be issued by the corresponding interrupt request flag. • The EI instruction (which enables all interrupts) must be executed. The interrupt enable flags are located on the interrupt enable register on the register file. Figures 12-14 through 12-16 show the configuration and function of each interrupt enable register. Figure 12-14. Configuration of Interrupt Enable Register 1 Name Flag symbol b3 I P S I O 1 b2 I P S I O 0 b1 I P T M 3 b0 I P T M 2 Address 2DH Read/Write R/W Interrupt enable 1 Power-ON reset WDT&SP reset CE reset Clock stop 0 1 0 0 0 0 0 0 0 0 0 1 Disables Enables Enables or disables timer 2 interrupt Disables Enables Enables or disables timer 3 interrupt Disables Enables Enables or disables serial interface 0 interrupt Disables Enables Enables or disables serial interface 1 interrupt 0 1 0 1 Retained Retained |
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