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UPD17708 Datasheet(PDF) 176 Page - Renesas Technology Corp |
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UPD17708 Datasheet(HTML) 176 Page - Renesas Technology Corp |
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176 / 358 page  µPD17704, 17705, 17707, 17708, 17709 174 Figure 13-18. Configuration of Timer 1 Counter Clock Selection Register Caution When the TM1RES flag is read, 0 is always read. Name Flag symbol b3 T M 1 E N b2 T M 1 R E S b1 T M 1 C K 1 b0 T M 1 C K 0 Address 2AH Read/Write R/W Timer 1 counter clock selection Power-On reset WDT&SP reset CE reset Clock stop 0 1 0 1 0 0 0 100 kHz (10 s) 10 kHz (100 s) 2 kHz (500 s) 1 kHz (1 ms) Sets basic clock of timer 1 counter 0 0 0 0 0 0 0 0 1 1 Does not change Resets counter Resets timer 1 counter (valid on writing) 0 1 0 0 0 Retained Stops Starts Starts or stops timer 1 0 1 µ µ µ |
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