Electronic Components Datasheet Search
  English  ▼

X  

RT5133WSC Datasheet(PDF) 20 Page - Richtek Technology Corporation

Part # RT5133WSC
Description  Integrated PMIC with 8-Channel LDOs and 3 GPOs for Camera Module Applications
PDF  41 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT5133WSC Datasheet(HTML) 20 Page - Richtek Technology Corporation

Back Button RT5133WSC Datasheet HTML 16Page - Richtek Technology Corporation RT5133WSC Datasheet HTML 17Page - Richtek Technology Corporation RT5133WSC Datasheet HTML 18Page - Richtek Technology Corporation RT5133WSC Datasheet HTML 19Page - Richtek Technology Corporation RT5133WSC Datasheet HTML 20Page - Richtek Technology Corporation RT5133WSC Datasheet HTML 21Page - Richtek Technology Corporation RT5133WSC Datasheet HTML 22Page - Richtek Technology Corporation RT5133WSC Datasheet HTML 23Page - Richtek Technology Corporation RT5133WSC Datasheet HTML 24Page - Richtek Technology Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 20 / 41 page
background image
RT5133
R
Copyright © 2021 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
DS5133-02
February
2021
20
Register Map
Register Detailed Description
Address
Reg Name
Bit
Bit Name
Default
Type
Description
0x00
CHIP_INFO
7:4
VENDOR_ID
0111
RO
Vendor Identification
3:0
CHIP_REV
0010
RO
Chip Revision :
0001 : 1st Version
0010 : 2nd Version
...
1111 : 15th Version
0x06
RST_CTRL
7:4
RST_PAS_CODE
0000
RW
RESET Passcode
Set REG 0x06[7:4] =
1011, then unlock
REG0x06[0] ALL_RST
To erase
RST_PAS_CODE,
ALL_RST cannot work.
3:1
EN_TD
010
RW
Deglitch time of EN
000 : 0ms (Sync only)
001 : 0.5ms
010 : 1ms (default)
011 : 2ms
100 : 4ms
101 : 6ms
110 : 8ms
111 : 10ms
0
ALL_RST
0
RWC
Reset bit of ALL register
and logic
0 : No reset (default)
1 : Reset all registers and
logic
Note : After reset
procedure, this bit is
cleared to '0'
0x07
TM_PAS_
CODE1
7
INT_RETRIGGER
0
RWC
Interrupt Re-Trigger
control
0 : Disabled (default)
1 : Re-Trigger IRQB
Note: After re-trigger, this
bit is cleared to '0'
6:5
INT_RET
00
RW
Pulse width of re-trigger
interrupt
00 : 16
s (default)
01 : 32
s
10 : 64
s
11 : 128
s
4:0
Reserved
00000
RW



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com