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RT5133WSC Datasheet(PDF) 20 Page - Richtek Technology Corporation |
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RT5133WSC Datasheet(HTML) 20 Page - Richtek Technology Corporation |
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20 / 41 page ![]() RT5133 R Copyright © 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5133-02 February 2021 20 Register Map Register Detailed Description Address Reg Name Bit Bit Name Default Type Description 0x00 CHIP_INFO 7:4 VENDOR_ID 0111 RO Vendor Identification 3:0 CHIP_REV 0010 RO Chip Revision : 0001 : 1st Version 0010 : 2nd Version ... 1111 : 15th Version 0x06 RST_CTRL 7:4 RST_PAS_CODE 0000 RW RESET Passcode Set REG 0x06[7:4] = 1011, then unlock REG0x06[0] ALL_RST To erase RST_PAS_CODE, ALL_RST cannot work. 3:1 EN_TD 010 RW Deglitch time of EN 000 : 0ms (Sync only) 001 : 0.5ms 010 : 1ms (default) 011 : 2ms 100 : 4ms 101 : 6ms 110 : 8ms 111 : 10ms 0 ALL_RST 0 RWC Reset bit of ALL register and logic 0 : No reset (default) 1 : Reset all registers and logic Note : After reset procedure, this bit is cleared to '0' 0x07 TM_PAS_ CODE1 7 INT_RETRIGGER 0 RWC Interrupt Re-Trigger control 0 : Disabled (default) 1 : Re-Trigger IRQB Note: After re-trigger, this bit is cleared to '0' 6:5 INT_RET 00 RW Pulse width of re-trigger interrupt 00 : 16 s (default) 01 : 32 s 10 : 64 s 11 : 128 s 4:0 Reserved 00000 RW |
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