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TAS5086 Datasheet(PDF) 11 Page - Texas Instruments |
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TAS5086 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 41 page ![]() www.ti.com Reset Timing (RESET) tw(RESET) Earliest time that M-State could be exited RESET M-State tr(DMSTATE) < 200 ns tr(I2C_ready) Start system tr(run) Determine SCLK rate and MCLK ratio. Enable via I2C. T0029-03 TAS5086 SLES131A – FEBRRUARY 2005 – REVISED MAY 2006 DETAILED DESCRIPTION (continued) The TAS5086 has input multiplexers that allow any of the input channels to be routed to any PWM channel and output multiplexers to enable any PWM output to be routed to any PWM output pin. It also has individual channel dc-blocking filters that are enabled by default. Individual channel de-emphasis filters for 32, 44.1, and 48 kHz are included and can be enabled and disabled. There is also a two-channel downmix result that can be output on SDOUT (I2S format). This result also can be sent to the left and right front channels (channels 1 and 2) and/or to the center and subwoofer (channels 5 and 6) as well. A mixer on the subwoofer channel supports bass management configuration 1. PWM output characteristics • Up to 8 × oversampling • 12 × at f S = 32 kHz, 8× at fS = 48 kHz, 4× at fS = 96 kHz, 2× at fS = 192 kHz • 4th-order noise shaping • ≥105-dB dynamic range, 0–20 kHz (TAS5086 + TAS5186 system measured at speaker terminals) • THD < 0.06% (measured at TAS5086 outputs) • Adjustable maximum modulation limit of 93.8% to 99.2% Control-signal parameters over recommended operating conditions (unless otherwise noted) PARAMETER MIN TYP MAX UNIT tr(DMSTATE) Time to M-STATE low 370 ns tw(RESET) Pulse duration, RESET active 400 None ns tr(I2C_ready) Time to enable I2C 3 ms tr(run) Device start-up time 10 ms NOTE: Because a crystal time base is used, the system determines the CLK rates. Once the data rate and master clock ratio are determined, the system outputs audio if a master volume command is issued. Figure 4. Reset Timing 11 Submit Documentation Feedback |
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