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MAX77720 Datasheet(PDF) 32 Page - Analog Devices |
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MAX77720 Datasheet(HTML) 32 Page - Analog Devices |
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32 / 52 page ![]() Wide Output-Voltage Range, Dual- Polarity PMIC MAX77720 www.analog.com Analog Devices | 32 Calculate the value of RTOP (from VFBBST to VOUTBST) for a desired VOUTBST at startup with the following equation: ������������������������ = ������������������������ ������ ( ������������������������������������������ ������������������������������������ − 1) Where: • VOUTBST is the desired positive output voltage • VFBBST is the default internal reference voltage at the FBBST pin, 1.25V (typ) For best accuracy, set RBOT to a value smaller than 475kΩ to ensure that the current flowing through it is significantly larger than the FBBST pin bias current. The advantage of using a higher value for RBOT is the reduction of quiescent current for achieving the highest efficiency at light load currents. However, using RBOT values that are lower increases immunity against noise injection. Additionally, using one percent tolerance resistors (or better) are recommended to maintain high output-voltage accuracy. Figure 12 shows a small circuit diagram of the feedback network. PGNDBST VOUTBST FBBST AGND RTOP RBOT Figure 12. Connecting External Feedback Network Detailed Description—Two-Wire Communication General Description The MAX77720 uses a 2-wire bus system to communicate by standard I2C protocol. The target address used by the host to access the IC determines what memory locations are available to read or write. System Configuration The 2-wire bus system supporter operation as a target-only device in a single or multitarget, and single or multicontroller system. Using a 7-bit target address, the system can support up to 128 target addresses. The 2-wire interface consists of a serial data line (SDA) and serial clock line (SCL). SDA and SCL provide bidirectional communication between the IC and a controller device at speeds up to 1MHz. TARGET TRANSMITTER/ RECEIVER TARGET TRANSMITTER TARGET RECEIVER CONTROLLER TRANSMITTER/ RECEIVER CONTROLLER TRANSMITTER/ RECEIVER SDA SCL Figure 13. Functional Logic Diagram for the Communications Controller |
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