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CDCDB803 Datasheet(PDF) 3 Page - Texas Instruments

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Part # CDCDB803
Description  CDCDB803 DB800ZL-Compliant 8-Output Clock Buffer for PCIe Gen 1 to Gen 6
PDF  34 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CDCDB803 Datasheet(HTML) 3 Page - Texas Instruments

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5 Pin Configuration and Functions
1
CKPWRGD_PD#
36
CK6_N
2
VDDR
35
CK6_P
3
CLKIN_P
34
VDD
4
CLKIN_N
33
CK5_N
5
SADR0
32
CK5_P
6
SMBDAT
31
OE5#
7
SMBCLK
30
OE4#
8
SADR1
29
CK4_N
9
NC
28
CK4_P
10
NC
27
VDD
11
VDD
26
CK3_N
12
OE0#
25
CK3_P
Not to scale
GND
Figure 5-1. CDCDB803 RSL Package 48-Pin VQFN Top View
Table 5-1. Pin Functions
PIN
TYPE(2)
DESCRIPTION
NAME
NO.
INPUT CLOCK
CLKIN_P
3
I
LP-HCSL differential clock input. Typically connected directly to the differential
output of clock source.
CLKIN_N
4
I
OUTPUT CLOCKS
CK0_P
13
O
LP-HCSL differential clock output of channel 0. Typically connected directly to PCIe
differential clock input. If unused, the pins can be left no connect.
CK0_N
14
O
CK1_P
16
O
LP-HCSL differential clock output of channel 1. Typically connected directly to PCIe
differential clock input. If unused, the pins can be left no connect.
CK1_N
17
O
www.ti.com
CDCDB803
SNAS820A – AUGUST 2021 – REVISED MAY 2022
Copyright © 2022 Texas Instruments Incorporated
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Product Folder Links: CDCDB803



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