AMC131M02 datasheet(40/89 Pages) TI

40 / 89 page

The number of words in a command depends on the command provided. For most commands, there are four

words in a frame. On DIN, the host provides the command, the command CRC if input CRC is enabled or a

word of zeros if input CRC is disabled, and two additional words of zeros. Simultaneously on DOUT, the device

outputs the response from the previous frame command, two words of ADC data representing the two ADC

channels, and a CRC word. If one or several of the ADC channels are disabled, this frame structure of four

words still applies, and the data of disabled channels reads all zeros. Figure 8-22 shows a typical command

frame structure.

DRDY

SCLK

DIN

DOUT

Channel 0 Data

Channel 1 Data

CRC

Response

Hi-Z

Channel 0 Data

Response

Command

CRC

Command

CRC

Figure 8-22. Typical Communication Frame

There are some commands that require more than four words. In the case of a read register (RREG) command

where multiple registers are read, the response to the command contains the acknowledgment of the command

followed by the register contents requested, which can require a larger frame depending on how many registers

are read. See the RREG section for more details on the RREG command.

In the case of a write register (WREG) command where multiple registers are written, the frame extends to

accommodate the additional data. See the WREG section for more details on the WREG command.

See the Commands section for a list of all valid commands and the corresponding responses on the

AMC131M02.

Under special circumstances, a data frame can be shortened by the host. See the Short SPI Frames section for

more information about artificially shortening communication frames.

8.5.1.8 SPI Communication Words

An SPI communication frame with the AMC131M02 is made of words. Words on DIN can contain commands,

responses, register settings during a register read, ADC conversion data, or the CRC of the output data.

Words can be 16, 24, or 32 bits. The word size is configured by the WLENGTH[1:0] bits in the MODE register.

The device defaults to a 24-bit word size. Commands, responses, CRC, and registers always contain 16 bits of

actual data. These words are always most significant bit (MSB) aligned, and therefore the least significant bits

(LSBs) are zero-padded to accommodate 24- or 32-bit word sizes. ADC conversion data are nominally 24 bits.

The ADC truncates the eight LSBs when the device is configured for 16-bit word size. There are two options

AMC131M02

SBASA56 – SEPTEMBER 2023

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