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AD82587D Datasheet(PDF) 32 Page - Elite Semiconductor Memory Technology Inc. |
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AD82587D Datasheet(HTML) 32 Page - Elite Semiconductor Memory Technology Inc. |
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32 / 45 page ![]() ESMT AD82587D Elite Semiconductor Memory Technology Inc. Publication Date: Jan. 2018 Revision: 1.6 32/45 Address 0X09 : Power saving mode switching level If the PWM exceeds the programmed switching power level (default 30*40ns), the modulation algorithm will change from quaternary to ternary modulation. Ternary modulation has less switching loss, resulting in higher power efficiency during larger power output operations. If the PWM drops below the programmed switching power level, the modulation algorithm will change back to quaternary modulation. BIT NAME DESCRIPTION VALUE FUNCTION B[7:5] X Reserved B[4:0] QTS[4:0] Quaternary and Ternary Switching Level 11111 62 11110 60 ︰ ︰ ︰ ︰ 10000 32 01111 30 01110 28 01101 26 ︰ ︰ 00001 4 00000 4 Total Harmonic Distortion + Noise v.s. Output Power Color Sweep Trace Line Style Thick Data Axis Comment 1 1 Red Solid 2 Anlr.THD+N Ratio Left Q 2 1 Blue Solid 3 Anlr.THD+N Ratio Left Q+T level 30 3 1 Magenta Solid 3 Anlr.THD+N Ratio Left Q+T level 40 4 1 Green Solid 3 Anlr.THD+N Ratio Left Q+T level 20 5 1 Cyan Solid 3 Anlr.THD+N Ratio Left Q+T level 46 0.04 2 0.06 0.08 0.2 0.3 0.5 0.7 1 % 2 20 3 4 5 6 7 8 9 10 W 24V, 8Ω Quaternary Q+T level 20 Q+T level 30 Q+T level 40 Q+T level 46 |
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