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AD82587D Datasheet(PDF) 33 Page - Elite Semiconductor Memory Technology Inc. |
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AD82587D Datasheet(HTML) 33 Page - Elite Semiconductor Memory Technology Inc. |
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33 / 45 page ![]() ESMT AD82587D Elite Semiconductor Memory Technology Inc. Publication Date: Jan. 2018 Revision: 1.6 33/45 Address 0X10 : Top 5 bits of attack threshold for Dynamic Range Control (DRC) The AD82587D provides dynamic range control function. When the input RMS exceeds the programmable attack threshold value, the output power will be limited by this threshold power level via gradual gain reduction. Attack threshold is defined by 21-bit representation composed of registers controlled by I2C. The device addresses of DRC attack threshold are 0X10, 0X11, and 0X12. BIT NAME DESCRIPTION VALUE FUNCTION B[7:5] X Reserved B[4:0] ATT[4:0] Top 5 Bits of Attack Threshold X User programmed 01000 0dB Address 0X11 : Middle 8 bits of attack threshold BIT NAME DESCRIPTION VALUE FUNCTION B[7:0] ATM[7:0] Middle 8 Bits of Attack Threshold X User programmed 00000000 0dB Address 0X12 : Bottom 8 bits of attack threshold BIT NAME DESCRIPTION VALUE FUNCTION B[7:0] ATB[7:0] Bottom 8 bits of attack threshold X User programmed 00000000 0dB |
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