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ATTINY13 Datasheet(PDF) 62 Page - ATMEL Corporation

Part # ATTINY13
Description  8-bit Microcontroller with 1K Bytes In-System Programmable Flash
PDF  177 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATTINY13 Datasheet(HTML) 62 Page - ATMEL Corporation

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62
ATtiny13
2535G–AVR–01/07
Compare Match Output
Unit
The Compare Output mode (COM0x1:0) bits have two functions. The Waveform Gener-
ator uses the COM0x1:0 bits for defining the Output Compare (OC0x) state at the next
Compare Match. Also, the COM0x1:0 bits control the OC0x pin output source. Figure 29
shows a simplified schematic of the logic affected by the COM0x1:0 bit setting. The I/O
Registers, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the
general I/O Port Control Registers (DDR and PORT) that are affected by the COM0x1:0
bits are shown. When referring to the OC0x state, the reference is for the internal OC0x
Register, not the OC0x pin. If a system reset occur, the OC0x Register is reset to “0”.
Figure 29. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC0x) from the
Waveform Generator if either of the COM0x1:0 bits are set. However, the OC0x pin
direction (input or output) is still controlled by the Data Direction Register (DDR) for the
port pin. The Data Direction Register bit for the OC0x pin (DDR_OC0x) must be set as
output before the OC0x value is visible on the pin. The port override function is indepen-
dent of the Waveform Generation mode.
The design of the Output Compare pin logic allows initialization of the OC0x state before
the output is enabled. Note that some COM0x1:0 bit settings are reserved for certain
modes of operation. See “8-bit Timer/Counter Register Description” on page 69.
Compare Output Mode and
Waveform Generation
The Waveform Generator uses the COM0x1:0 bits differently in Normal, CTC, and PWM
modes. For all modes, setting the COM0x1:0 = 0 tells the Waveform Generator that no
action on the OC0x Register is to be performed on the next Compare Match. For com-
pare output actions in the non-PWM modes refer to Table 26 on page 69. For fast PWM
mode, refer to Table 27 on page 69, and for phase correct PWM refer to Table 28 on
page 70.
A change of the COM0x1:0 bits state will have effect at the first Compare Match after
the bits are written. For non-PWM modes, the action can be forced to have immediate
effect by using the FOC0x strobe bits.
PORT
DDR
DQ
DQ
OCn
Pin
OCnx
DQ
Waveform
Generator
COMnx1
COMnx0
0
1
FOCn
clk
I/O



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