BK2535 datasheet(49/133 Pages) BEKEN

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BK2535 datasheet

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Table 27 ADC register0

ADDR

adc_dataL[7:0]

0x0920

adc_data low 8 bits

Table 28 ADC register1

ADDR

[7]

[6:4]

[3:0]

0x092

adc_setting

pre_divid[2:0

]

adc_dataH

adc_setting: the setting time for ADC after power on, 1：40us。 0：

20us

pre_divid[2:0]: clock divider (the number should be fixed as 0x01)

adc_dataH：the higher 4 bits for adc_dat.

high resolution mode:{adc_dataH[3:0],adc_dataL[7:0]},

normal mode:

{adc_dataH[1:0],adc_dataL[7:0]}.

Table 29 ADC register2

ADDR

adc_rate

0x0923

adc_rate low 8 bits

Table 30 ADC register3

ADDR

[7]

[6:5]

[4:0]

0x092

High_res_mod

adc_dly[1：0]

adc_rate[12:8]

High_res_mode: 12 bits mode or 10 bits mode

adc_dly: the valid sample for the first conversion. please set as 2 or 3

for this register.

adc_rate： the high 5 bits for adc_rate

Table 31 ADC register4

6.3.3.

Sample rate:

Given an ADC sample rate, you can calculate the adc_rate value as below:

ADC sample = system_clk/(( pre_divid+1)*( adc_rate+1))

ADC sample = system_clk/(( pre_divid+1)*( adc_rate+1))/4 High_res_mode

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