Philips Semiconductors Linear Products

Product specification

ICM7555

General purpose CMOS timer

August 31, 1994

345

Astable Operation

If the circuit is connected as shown in Figure 2, it will trigger itself

and free run as a multivibrator. The external capacitor charges

cycle (D) may be precisely set by the ratio of these two resistors. In

this mode of operation, the capacitor charges and discharges

threshold levels are directly proportional to the supply voltage, the

frequency of oscillation is independent of the supply voltage.

1.38

F =

C

D =

Monostable Operation

In this mode of operation, the timer functions as a one-shot. Initially,

the external capacitor (C) is held discharged by a transistor inside

the timer. Upon application of a negative pulse to Pin 2,TRIGGER,

the internal flip-flop is set which releases the low impedance on

DISCHARGE; the external capacitor charges and drives the

OUTPUT High. The voltage across the capacitor increases

flip-flop, which in turn discharges the capacitor rapidly and also

drives the OUTPUT to its low state. TRIGGER must return to a high

state before the OUTPUT can return to a low state.

Control Voltage

The CONTROL VOLTAGE terminal permits the two trip voltages for

the THRESHOLD and TRIGGER internal comparators to be

controlled. This provides the possibility of oscillation frequency

modulation in the astable mode, or even inhibition of oscillation,

depending on the applied voltage. In the monostable mode, delay

times can be changed by varying the applied voltage to the

CONTROL VOLTAGE pin.

RESET

The RESET terminal is designed to have essentially the same trip

voltage as the standard bipolar 555, i.e., 0.6 to 0.7V. At all supply

voltages it represents an extremely high input impedance. The

mode of operation of the RESET function is, however, much

improved over the standard bipolar 555 in that it controls only the

internal flip-flop, which in turn controls simultaneously the state of

the OUTPUT and DISCHARGE pins. This avoids the multiple

threshold problems sometimes encountered with slow falling edges

in the bipolar devices.

1

2

3

4

8

7

6

5

GND

TRIGGER

OUTPUT

RESET

DISHCARGE

THRESHOLD

CONTROL

VOLTAGE

OUTPUT

V

DD

R

A

B

R

V

DD

V

DD

C

Figure 2. Astable Operation

1

2

3

4

8

7

6

5

TRIGGER

OUTPUT

RESET

DISHCARGE

THRESHOLD

CONTROL

VOLTAGE

V

DD

C

OPTIONAL

CAPACITOR

R

A

Figure 3. Monostable Operation