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ISP1161 Datasheet(PDF) 70 Page - NXP Semiconductors |
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ISP1161 Datasheet(HTML) 70 Page - NXP Semiconductors |
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70 / 127 page  Philips Semiconductors ISP1161 Full-speed USB single-chip host and device controller Product data Rev. 01 — 3 July 2001 70 of 130 9397 750 08313 © Philips Electronics N.V. 2001. All rights reserved. Code (Hex): 13 — read Code (Hex): 93 — write 13.3.3 HcRhStatus Register The HcRhStatus register is divided into two parts. The lower word of a Dword represents the Hub Status field and the upper word represents the Hub Status Change field. Reserved bits should always be written as logic 0. Table 40: HcRhStatus Register: bit allocation Bit 31 30 29 28 27 26 25 24 Symbol CRWE reserved Reset N/A N/A Access W N/A Bit 23 22 21 20 19 18 17 16 Symbol reserved CCIC LPSC Reset N/A 0 0 Access N/A R/W R/W Bit 15 14 13 12 11 10 9 8 Symbol DRWE reserved Reset 00000000 Access R/W - Bit 7 6 5 4 3 2 1 0 Symbol reserved OCI LPS Reset 00000000 Access N/A R R/W |
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