AM29LV033C datasheet(23/49 Pages) AMD

23 / 49 page

22268B5 September 12, 2006

Am29LV033C

DA TA

SH EET

Any commands written to the chip during the Embed-

ded Erase algorithm are ignored. Note that a hard-

wa re r eset dur ing the chip er as e op er ation

immediately terminates the operation. The Chip Erase

command sequence should be reinitiated once the de-

vice has returned to reading array data, to ensure data

integrity.

The system can determine the status of the erase op-

eration by using DQ7, DQ6, DQ2, or RY/BY#. See

“Write Operation Status” on page 26 for information on

these status bits. When the Embedded Erase algo-

rithm is complete, the device returns to reading array

data and addresses are no longer latched.

Figure 4, on page 24 illustrates the algorithm for the

erase operation. See the “Erase/Program Operations”

on page 36 for parameters, and Figure 17, on page 38

for timing diagrams.

Sector Erase Command Sequence

Sector erase is a six bus cycle operation. The sector

erase command sequence is initiated by writing two

unlock cycles, followed by a set-up command. Two ad-

ditional unlock write cycles are then followed by the

address of the sector to be erased, and the sector

erase command. Table 9, on page 25 shows the ad-

dress and data requirements for the sector erase com-

mand sequence.

The device does not require the system to preprogram

the memory prior to erase. The Embedded Erase al-

gorithm automatically programs and verifies the sector

for an all zero data pattern prior to electrical erase.

The system is not required to provide any controls or

timings during these operations.

After the command sequence is written, a sector erase

time-out of 50 µs begins. During the time-out period,

additional sector addresses and sector erase com-

mands may be written. Loading the sector erase buffer

may be done in any sequence, and the number of sec-

tors may be from one sector to all sectors. The time

between these additional cycles must be less than 50

µs, otherwise the last address and command might

not be accepted, and erasure may begin. It is recom-

mended that processor interrupts be disabled during

this time to ensure all commands are accepted. The

interrupts can be re-enabled after the last Sector

Erase command is written. If the time between addi-

tional sector erase commands can be assumed to be

less than 50 µs, the system need not monitor DQ3.

Any command other than Sector Erase or Erase

Suspend during the time-out period resets the de-

vice to reading array data. The system must rewrite

the command sequence and any additional sector ad-

dresses and commands.

The system can monitor DQ3 to determine if the sec-

tor erase timer has timed out. (See the “DQ3: Sector

Erase Timer” on page 28 section.) The time-out be-

gins from the rising edge of the final WE# pulse in the

command sequence.

Once the sector erase operation has begun, only the

Erase Suspend command is valid. All other com-

mands are ignored. Note that a hardware reset dur-

ing the sector erase operation immediately terminates

the operation. The Sector Erase command sequence

should be reinitiated once the device has returned to

reading array data, to ensure data integrity.

When the Embedded Erase algorithm is complete, the

device returns to reading array data and addresses

are no longer latched. The system can determine the

status of the erase operation by using DQ7, DQ6,

DQ2, or RY/BY#. (Refer to “Write Operation Status”

on page 26 for information on these status bits.)

Figure 4, on page 24 illustrates the algorithm for the

erase operation. Refer to the “Erase/Program Opera-

tions” on page 36 tables in the “AC Characteristics”

section for parameters, and to Figure 17, on page 38

for timing diagrams.

Erase Suspend/Erase Resume

Commands

The Erase Suspend command allows the system to in-

terrupt a sector erase operation and then read data

from, or program data to, any sector not selected for

erasure. This command is valid only during the sector

erase operation, including the time-out period 50 µs

during the sector erase command sequence. The

Erase Suspend command is ignored if written during

the chip erase operation or Embedded Program algo-

rithm. Writing the Erase Suspend command during the

Sector Erase time-out immediately terminates the

time-out period and suspends the erase operation. Ad-

dresses are “don’t-cares” when writing the Erase Sus-

pend command.

When the Erase Suspend command is written during a

sector erase operation, the device requires a maxi-

mum of 20 µs to suspend the erase operation. How-

ever, when the Erase Suspend command is written

during the sector erase time-out, the device immedi-

ately terminates the time-out period and suspends the

erase operation.

After the erase operation has been suspended, the

system can read array data from or program data to

any sector not selected for erasure. (The device “erase

suspends” all sectors selected for erasure.) Normal

read and write timings and command definitions apply.

Reading at any address within erase-suspended sec-

tors produces status data on DQ7–DQ0. The system

can use DQ7, or DQ6 and DQ2 together, to determine

if a sector is actively erasing or is erase-suspended.

See “Write Operation Status” on page 26 for informa-

tion on these status bits.

AM29LV033C Datasheet(PDF) 23 Page - Advanced Micro Devices

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