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MBM29F400TC Datasheet(PDF) 3 Page - SPANSION

Part # MBM29F400TC
Description  FLASH MEMORY CMOS 4M (512K x 8/256K x 16) BIT
PDF  48 Pages
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Manufacturer  SPANSION [SPANSION]
Direct Link  http://www.spansion.com
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MBM29F400TC Datasheet(HTML) 3 Page - SPANSION

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MBM29F400TC-55/-70-90/MBM29F400BC-55/-70-90
2
(Continued)
The MBM29F400TC/BC is pin and command set compatible with JEDEC standard. Commands are written to
the command register using standard microprocessor write timings. Register contents serve as input to an
internal state-machine which controls the erase and programming circuitry. Write cycles also internally latch
addresses and data needed for the programming and erase operations. Reading data out of the devices is similar
to reading from12.0 V Flash or EPROM devices.
The MBM29F400TC/BC is programmed by executing the program command sequence. This will invoke the
Embedded Program Algorithm which is an internal algorithm that automatically times the program pulse widths
and verifies proper cell margin. Typically, each sector can be programmed and verified in less than 0.5 seconds.
Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase
Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed
before executing the erase operation. During erase, the device automatically times the erase pulse widths and
verifies proper cell margin.
A sector is typically erased and verified in 1.0 second (if already completely preprogrammed.).
The devices also features a sector erase architecture. The sector mode allows each sector to be erased and
reprogrammed without affecting other sectors. The MBM29F400TC/BC is erased when shipped from the factory.
The devices features single 5.0 V power supply operation for both read and write functions. Internally generated
and regulated voltages are provided for the program and erase operations. A low VCC detector automatically
inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ7,
by the Toggle Bit feature on DQ6, or the RY/BY output pin. Once the end of a program or erase cycle has been
completed, the device internally resets to the read mode.
Fujitsu’s Flash technology combines years of EPROM and E2PROM experience to produce the highest levels
of quality, reliability, and cost effectiveness. The MBM29F400TC/BC memory electrically erase the entire chip
or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one
byte/word at a time using the EPROM programming mechanism of hot electron injection.



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