LTM4686B datasheet(63/132 Pages) AD

63 / 132 page

LTM4683

Rev. 0

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Figure 27. Programmable Loop Compensation

Figure 28. Error Amp gm Adjust

INCREASE gm

FREQUENCY

4683 F28

GAIN

TYPE II COMPENSATION

–

VREF

4683 F27

CCOMPH

CCOMPL

COMPnb

RCOMPn

COMPna

APPLICATIONS INFORMATION

closed-loop response test point. The DC step, rise time

and settling time at this test point truly reflect the closed-

loop response. Assuming a predominantly second-order

system, phase margin and/or damping factor can be

estimated using the percentage of overshoot seen at this

pin. The bandwidth can also be estimated by examining

the rise time at the pin. The COMPna external capacitor

shown in the Typical Application circuits will provide an

adequate starting point for most applications. The pro-

grammable parameters that affect loop gain are the output

voltage range bit[1] of the MFR_PWM_MODE command,

the current range bit[7] of the MFR_PWM_MODE com-

mand, the gm of the PWM channel amplifier bits [7:5] of

MFR_PWM_COMP, and the internal RCOMP compensa-

tion resistor bits[4:0] of MFR_PWM_COMP. Be sure to

establish these settings before compensation calculation.

The COMPna series internal RCOMPn and external CCOMPna

filter sets the dominant pole-zero loop compensation. The

internal RCOMPn value can be modified (from 0Ω to 62kΩ)

using bits[4:0] of the MFR_PWM_COMP command. Adjust

the value of RCOMPn to optimize transient response once

the final PCB layout is done and the particular CCOMPnb

filter capacitor and output capacitor type and value have

been determined. The output capacitors must be selected

because the various types and values determine the loop

gain and phase. An output current pulse of 20% to 80%

of full-load current having a rise time of 1µs to 10µs will

produce output voltage and COMP pin waveforms that will

give a sense of the overall loop stability without breaking

the feedback loop. Placing a power MOSFET with a resistor

to ground directly across the output capacitor and driving

the gate with an appropriate signal generator is a practi-

cal way to produce a load step. The MOSFET + RSERIES

will produce output currents approximately equal to VOUT/

RSERIES. RSERIES values from 0.1Ω to 2Ω are valid depend-

ing on the current limit settings and the programmed

output voltage. The initial output voltage step resulting

from the step change in output current may not be within

the bandwidth of the feedback loop, so this signal cannot

be used to determine the phase margin. This is why it

is better to look at the COMP pin signal, which is in the

feedback loop and is the filtered and compensated control

loop response. The gain of the loop will be increased by

increasing RCOMP, and the bandwidth of the loop will be

Figure 29. RCOMP Adjust

INCREASE RCOMPn

FREQUENCY

4683 F29

GAIN

TYPE II COMPENSATION

series resistance of COUT. ∆ILOAD also begins to charge or

discharge COUT generating, the feedback error signal that

forces the regulator to adapt to the current change and

return VOUT to its steady-state value. During this recovery

time, VOUT can be monitored for excessive overshoot or

ringing, indicating a stability problem. The availability of

the COMP pin not only allows optimization of control loop

behavior but also provides a DC-coupled and AC-filtered

LTM4686B Datasheet(PDF) 63 Page - Analog Devices

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