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Data Sheet

LT7170/LT7170-1

THEORY OF OPERATION

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Rev. 0 | 17 of 36

OVERVIEW

The LT7170/LT7170-1 are monolithic, dual-phase, DC/DC synchro-

nous step-down regulators capable of providing up to 20 A of

continuous output current with input supply voltages up to 16

V. For the LT7170, connect SW0 and SW1 together to a single

inductor to drive a single-regulated output supply. For the LT7170-1

dual-phase option, connect an inductor to each of the switch pins,

SW0 and SW1, to drive a single-regulated output supply. The

switching phases are set to 180° out of phase. The phase selected

by configuration resistors or by the MFR_PWM_PHASE_LT7170

command sets the phase difference between the SYNC/PWM_CFG

input and the SW0 output. The I2C-based serial peripheral interface

(SPI) is compatible with PMBus 1.3, which supports bus speeds up

to 1 MHz.

Major features include the following:

►

Programmable VOUT

►

Programmable current limit

►

Programmable fSW

►

Programmable overvoltage and undervoltage comparators

►

Programmable on and off delay times

►

Programmable output rise and/or fall times

►

Programmable control loop compensation

►

Programmable input undervoltage threshold

►

Selectable switch slew rate for EMI and efficiency optimization

►

Dedicated power-good pin

►

PLL for synchronous operation with an external clock

►

Input and output voltage, output current, and die temperature

telemetry

►

Programmable output current readback sampling window

►

Reduced power telemetry mode that slows analog-to-digital

converter (ADC) sampling frequency to reduce input quiescent

current

►

Fully differential remote VOUT sense

►

3x programmable nonvolatile configuration memory with error

correcting code (ECC)

►

Optional external configuration resistors to set key operating

parameters

►

Standalone operation using either configuration resistors or non-

volatile configuration memory

►

A variety of fault and warning handling and reporting mecha-

nisms

A dedicated ALERT pin is provided to indicate that faults or warn-

ings have occurred.

Individual status commands enable fault and warning reporting to

identify the specific event.

Fault reporting and shutdown behavior are fully configurable. Faults

can be individually masked, and the fault responses can be pro-

grammed to retry or remain shutdown. Fault and warning detection

capabilities include the following:

►

Output undervoltage and overvoltage faults and warnings

►

Internal overtemperature fault and warning

►

Communication, memory, or logic (CML) faults

►

Input overvoltage fault and undervoltage warning

►

Output overcurrent fault and warning

SWITCHING REGULATOR CONTROL LOOP

The LT7170/LT7170-1 employ a controlled on-time, valley current-

mode architecture. In normal operation, the internal top power,

metal-oxide semiconductor FET (MOSFET) is turned on for an

interval determined by an on-time control circuit. When the top

power MOSFET turns off, the bottom power MOSFET turns on until

the valley current comparator trips, restarting the on-time control

circuit and initiating the next cycle. Inductor current is determined

by sensing the voltage drop across the bottom power MOSFET

when it is on. The error amplifier adjusts the average inductor cur-

rent (ITH) node voltage by comparing the regulator output voltage

with an internal reference digital-to-analog converter (DAC) output.

The voltage on the ITH node sets the comparator threshold, which

is compared with the sensed-inductor valley current. An increase

in load current causes a drop in the output voltage relative to the

internal reference. The error amplifier responds by forcing the ITH

voltage higher until the average inductor current matches that of the

load current.

An internal PLL synchronizes the oscillator frequency to an external

clock signal if one is present on the SYNC/PWM_CFG pin. If no ex-

ternal clock is applied, the fSW is set by the FREQUENCY_SWITCH

command, which can be initialized by using configuration resistors

(see the Setting Switching Frequency and PWM Mode for more

details).

NVM

The LT7170/LT7170-1 contain internal programmable NVM with

ECC to store user configuration settings. The NVM can be pro-

grammed up to three times. During NVM write operations, TJ must

be between −40°C and +125°C, and VIN must be biased between

9.6 V to 16 V.

In addition to ECC, the integrity of the on-board NVM is checked

with a cyclic redundancy check (CRC) calculation after a power-on

reset or execution of a RESTORE_USER_ALL command. If an

invalid CRC is detected, the regulator output remains disabled until

the issue is resolved.

See the LT7170/LT7170-1 PMBus/I2C Reference Manual for more

information about NVM programming.

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