56F8322 datasheet(25/136 Pages) FREESCALE

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Signal Pins

56F8322 Technical Data, Rev. 16

Freescale Semiconductor

Preliminary

PWMA4

(MOSI1)

(GPIOA4)

Output

Schmitt

Input/

Output

Schmitt

Input/

Output

In reset,

output is

disabled,

pull-up is

enabled

PWMA4 — This is one of six PWMA output pins.

SPI 1 Master Out/Slave In — This serial data pin is an output from a

master device and an input to a slave device. The master device

places data on the MOSI line a half-cycle before the clock edge the

slave device uses to latch the data.

Port A GPIO — This GPIO pin can be individually programmed as an

input or output pin.

In the 56F8322, the default state after reset is PWMA4.

In the 56F8122, the default state is not one of the functions offered

and must be reconfigured.

PWMA5

(SCLK1)

(GPIOA5)

Output

Schmitt

Input/

Output

Schmitt

Input/

Output

In reset,

output is

disabled,

pull-up is

enabled

PWMA5 — This is one of six PWMA output pins.

SPI 1 Serial Clock — In the master mode, this pin serves as an

output, clocking slaved listeners. In slave mode, this pin serves as the

data clock input. A Schmitt trigger input is used for noise immunity.

Port A GPIO — This GPIO pin can be individually programmed as an

input or output pin.

In the 56F8322, the default state after reset is PWMA5.

In the 56F8122, the default state is not one of the functions offered

and must be reconfigured.

FAULTA0

(GPIOA6)

Schmitt

Input

Schmitt

Input/

Output

Input

FAULTA0 — This fault input pin is used for disabling selected PWMA

outputs in cases where fault conditions originate off-chip.

Port A GPIO — This GPIO pin can be individually programmed as an

input or output pin.

In the 56F8322, the default state after reset is FAULTA0.

In the 56F8122, the default state is not one of the functions offered

and must be reconfigured.

ANA0

Input

Analog Input ANA0 - 2 — Analog inputs to ADCA, Channel 0

ANA1

ANA2

ANA4

Input

Analog Input ANA4 - 6 — Analog inputs to ADCA, Channel 1

ANA5

ANA6

Table 2-2 Signal and Package Information for the 48-Pin LQFP (Continued)

Signal Name

Pin No.

Type

State During

Reset

Signal Description

56F8322 Datasheet(PDF) 25 Page - Freescale Semiconductor, Inc

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