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56F8322 Datasheet(PDF) 88 Page - Freescale Semiconductor, Inc |
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56F8322 Datasheet(HTML) 88 Page - Freescale Semiconductor, Inc |
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88 / 136 page ![]() 56F8322 Techncial Data, Rev. 16 88 Freescale Semiconductor Preliminary As shown in Figure 6-10, the GPIO has the final control over which pin controls the I/O. SIM_GPS simply decides which peripheral will be routed to the I/O. Figure 6-10 Overall Control of Pads Using SIM_GPS Control Figure 6-11 GPIO Peripheral Select Register (SIM_GPS) 6.5.8.1 Reserved—Bits 15–8 This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing. 6.5.8.2 GPIO C6 (C6)—Bit 7 This bit selects the alternate function for GPIOC6. • 0 = TC0 (default) • 1 = TXD0 6.5.8.3 GPIOC5 (C5)—Bit 6 This bit selects the alternate function for GPIOC5. • 0 = TC1 (default) •1 = RXD0 Base + $B 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read 0 0 0 0 0 0 0 0 C6 C5 B1 B0 A5 A4 A3 A2 Write RESET 00 00 00 00 00 0 0 0 0 0 0 GPIOX_PER Register GPIO Controlled I/O Pad Control SIM_GPS Register Quad Timer Controlled SCI Controlled 0 1 0 1 |
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