AD7785 datasheet(25/32 Pages) AD

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AD7785

Rev. 0 | Page 25 of 32

CIRCUIT DESCRIPTION

ANALOG INPUT CHANNEL

The AD7785 has three differential analog input channels. These

are connected to the on-chip buffer amplifier when the device is

operated in buffered mode and directly to the modulator when

the device is operated in unbuffered mode. In buffered mode

(the BUF bit in the mode register is set to 1), the input channel

feeds into a high impedance input stage of the buffer amplifier.

Therefore, the input can tolerate significant source impedances

and is tailored for direct connection to external resistive-type

sensors, such as strain gauges or resistance temperature

detectors (RTDs).

When BUF = 0, the part is operated in unbuffered mode.

This results in a higher analog input current. Note that this

unbuffered input path provides a dynamic load to the driving

source. Therefore, resistor/capacitor combinations on the input

pins can cause gain errors, depending on the output impedance

of the source that is driving the ADC input. Table 17 shows the

allowable external resistance/capacitance values for unbuffered

mode such that no gain error at the 20-bit level is introduced.

Table 17. External R-C Combination for 20-Bit No Gain Error

C (pF)

R (Ω)

9 k

100

6 k

500

1.5 k

1000

900

5000

200

The AD7785 can be operated in unbuffered mode only when

the gain equals 1 or 2. At higher gains, the buffer is automati-

cally enabled. The absolute input voltage range in buffered

mode is restricted to a range between GND + 100 mV and

AVDD – 100 mV. When the gain is set to 4 or higher, the in-amp

is enabled. The absolute input voltage range when the in-amp is

active is restricted to a range between GND + 300 mV and

AVDD − 1.1 V. Take care in setting up the common-mode voltage

so that these limits are not exceeded to avoid degradation in

linearity and noise performance.

The absolute input voltage in unbuffered mode includes the

range between GND – 30 mV and AVDD + 30 mV as a result of

being unbuffered. The negative absolute input voltage limit does

allow the possibility of monitoring small true bipolar signals

with respect to GND.

INSTRUMENTATION AMPLIFIER

Amplifying the analog input signal by a gain of 1 or 2 is

performed digitally within the AD7785. However, when the

gain equals 4 or higher, the output from the buffer is applied

to the input of the on-chip instrumentation amplifier. This low

noise in-amp means that signals of small amplitude can be

gained within the AD7785 while still maintaining excellent

noise performance.

For example, when the gain is set to 64, the rms noise is 40 nV

typically, which is equivalent to 20 bits effective resolution or

18.5 bits peak-to-peak resolution.

The AD7785 can be programmed to have a gain of 1, 2, 4, 8, 16,

32, 64, and 128 using Bit G2 to Bit G0 in the configuration

unipolar ranges are from 0 mV to 20 mV to 0 V to 2.5 V while

the bipolar ranges are from ±20 mV to ±2.5 V. When the

in-amp is active (gain ≥ 4), the common-mode voltage (AIN(+)

+ AIN(–))/2 must be greater than or equal to 0.5 V.

If the AD7785 is operated with an external reference that has a

value equal to AVDD, the analog input signal must be limited to

90% of VREF/gain when the in-amp is active, for correct

operation.

BIPOLAR/UNIPOLAR CONFIGURATION

The analog input to the AD7785 can accept either unipolar or

bipolar input voltage ranges. A bipolar input range does not

imply that the part can tolerate negative voltages with respect to

system GND. Unipolar and bipolar signals on the AIN(+) input

are referenced to the voltage on the AIN(–) input. For example,

if AIN(−) is 2.5 V, and the ADC is configured for unipolar mode

and a gain of 1, the input voltage range on the AIN(+) pin is

2.5 V to 5 V.

If the ADC is configured for bipolar mode, the analog input

range on the AIN(+) input is 0 V to 5 V. The bipolar/unipolar

option is chosen by programming the U/B bit in the configura-

tion register.

DATA OUTPUT CODING

When the ADC is configured for unipolar operation, the output

code is natural (straight) binary with a zero differential input

voltage resulting in a code of 00000 hex, a midscale voltage

resulting in a code of 80000, and a full-scale input voltage

resulting in a code of FFFFF. The output code for any analog

input voltage can be represented as

Code = (2N × AIN × GAIN)/VREF

When the ADC is configured for bipolar operation, the output

code is offset binary with a negative full-scale voltage resulting

in a code of 00000 hex, a zero differential input voltage resulting

in a code of 80000 hex, and a positive full-scale input voltage

resulting in a code of FFFFF hex. The output code for any

analog input voltage can be represented as

Code = 2N – 1 × [(AIN × GAIN /VREF) + 1]

where:

AIN is the analog input voltage.

GAIN is the in-amp setting (1 to 128).

N = 20.

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