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DAC5652 Datasheet(PDF) 18 Page - Texas Instruments |
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DAC5652 Datasheet(HTML) 18 Page - Texas Instruments |
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18 / 22 page ![]() www.ti.com Gain Setting Option Sleep Mode DAC5652 SLAS452A – MARCH 2005 – REVISED FEBRUARY 2006 APPLICATION INFORMATION (continued) The full-scale output current on the DAC5652 can be set two ways: either for each of the two DAC channels independently or for both channels simultaneously. For the independent gain set mode, the GSET pin (pin 42) must be low (that is, connected to AGND). In this mode, two external resistors are required — one RSET connected to the BIASJ_A pin (pin 44) and the other to the BIASJ_B pin (pin 41). In this configuration, the user has the flexibility to set and adjust the full-scale output current for each DAC independently, allowing for the compensation of possible gain mismatches elsewhere within the transmit signal path. Alternatively, bringing the GSET pin high (that is, connected to AVDD), the DAC5652 switches into the simultaneous gain set mode. Now the full-scale output current of both DAC channels is determined by only one external RSET resistor connected to the BIASJ_A pin. The resistor at the BIASJ_B pin may be removed; however, this is not required since this pin is not functional in this mode and the resistor has no effect on the gain equation. The DAC5652 features a power-down function which can reduce the total supply current to approximately 3.1 mA over the specified supply range if no clock is present. Applying a logic high to the SLEEP pin initiates the power-down mode, while a logic low enables normal operation. When left unconnected, an internal active pulldown circuit enables the normal operation of the converter. 18 Submit Documentation Feedback |
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