MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA

34923

11

D14, Enable Logic

Bit D14, in conjunction with the PWM/ENABLE pin,

determines if the output drivers are in the chopped (OFF) or ON

state.

D15, Direction Logic

Bit D15, in conjunction with the DIR pin, determines if the

device is operating in the forward or reverse state.

D16, Divisor SPAN Select

is divided by 5 or 10.

D17, Internal PWM Mode

Bit D17, in conjunction with the PWMMODE pin, selects

mixed or slow current decay.

D18, Test Mode

Bit D18 low (default) operates the device in normal mode.

D18 is only used for testing purposes. The user should never

change this bit.

D19, Sleep Mode

Bit D19 selects a Sleep mode to minimize power

consumption when not in use. This disables much of the

internal circuitry, including the regulator and charge pump. On

power-up the serial port is initialized to all zeros. Bit D19 should

be programmed high for 1.0 ms before attempting to enable any

output driver.

Serial Port Write Timing Operations

Data is clocked into the shift register on the rising edge of the

CLOCK signal. Normally STROBE will be held high, only

brought low to initiate a write cycle. Refer to Figure 2, Serial Port

Write Timing, page 8, for the minimum timing requirements.

This internally generated voltage is used to operate the sink-

case of a fault condition, the outputs of the device are disabled.

Charge Pump

The charge pump is used to generate a gate supply voltage

ceramic capacitor should be connected between CP1 and CP2

for pumping purposes. A 0.22

µF ceramic capacitor should be

and, in the case of a fault condition, the source outputs of the

device are disabled.

Shutdown

In the event of a fault (excessive junction temperature or low

until the fault condition is removed. At power-up, and in the

drivers and resets the data in the serial port to all zeros.

PWM Timer Function

The PWM timer is programmable via the serial port (bits D2–

D10) to provide off-time PWM signals to the control circuitry. In

the mixed current-decay mode, the first portion of the off time

operates in fast decay, until the fast decay time count (serial bits

D7–D10) is reached, followed by slow decay for the rest of the

off-time period (bits D2–D6). If the fast decay time is set longer

than the off time, the device effectively operates in fast decay

mode. Bit D17, in conjunction with PWMMODE, selects mixed

or slow decay.

PWM/

ENABLE

D14

Operating

Mode

0

0

Chopped

1

1

1

0

ON

0

1

State

DIR

D15

DCMA

DCMB

Reverse

0

0

Low

High

1

1

Forward

1

0

High

Low

0

1

Divisor

SPAN

D16

÷5

1

0

0

1

÷10

0

0

1

1

PWMMODE

D17

Current

Decay Mode

0

0

Mixed

1

1

1

0

Slow

0

1

D19

Sleep Mode

0

Sleep

1

Normal

Freescale Semiconductor, Inc.

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