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LTM4613 Datasheet(PDF) 11 Page - Linear Technology |
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LTM4613 Datasheet(HTML) 11 Page - Linear Technology |
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11 / 30 page ![]() LTM4613 11 4613fd For more information www.linear.com/LTM4613 APPLICATIONS INFORMATION Figure 2. Operating Frequency vs Output Voltage Operating Frequency The operating frequency of the LTM4613 is optimized to achieve the compact package size and the minimum output ripple voltage while still keeping high efficiency. As shown in Figure 2, the frequency is linearly increased with larger output voltages to keep the low output cur- rent ripple. Figure 3 shows the inductor current ripple ∆I with different output voltages. In most applications, no additional frequency adjusting is required. If lower output ripple is required, the operating frequency f can be increased by adding a resistor RfSET between fSET pin and SGND, as shown in Figure 19. f = VOUT 1.5•10−10 RfSET ||133k ( ) [Hz] Figure 3. Pk-Pk Inductor Current Ripple vs Output Voltage Table 1. RFB Standard 1% Resistor Values vs VOUT VOUT (V) 3.3 5 6 8 10 12 14 15 RFB (kΩ) 22.1 13.7 11.0 8.06 6.34 5.23 4.42 4.12 The MPGM pin programs a current that when multiplied by an internal 10k resistor sets up the 0.6V reference ± offset for margining. A 1.18V reference divided by the RPGM resistor on the MPGM pin programs the current. Calculate VOUT(MARGIN): VOUT(MARGIN) = %VOUT 100 • VOUT Where %VOUT is the percentage of VOUT to be margined, and VOUT(MARGIN) is the margin quantity in volts: RPGM = VOUT 0.6V • 1.18V VOUT(MARGIN) •10k Where RPGM is the resistor value to place on the MPGM pin to ground. The margining voltage, VOUT(MARGIN), will be added or subtracted from the nominal output voltage as determined by the state of the MARG0 and MARG1 pins. See the truth table below: MARG1 MARG0 MODE LOW LOW NO MARGIN LOW HIGH MARGIN UP HIGH LOW MARGIN DOWN HIGH HIGH NO MARGIN Parallel Operation The LTM4613 device is an inherently current mode con- trolled device. This allows the paralleled modules to have very good current sharing and balanced thermals on the design.Figure21showsaschematicoftheparalleldesign. The voltage feedback equation changes with the variable N as modules are paralleled: RFB = 100k N VOUT 0.6V − 1 where N is the number of paralleled modules. OUTPUT VOLTAGE (V) 2 4 0 400 1000 6 10 12 4613 F02 200 800 600 8 14 16 OUTPUT VOLTAGE (V) 2 0 1 3 4 5 10 9 4613 F03 2 6 4 12 14 8 16 6 7 8 VIN = 16V VIN = 24V VIN = 28V VIN = 36V |
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