LTC6906 datasheet(8/30 Pages) AD

8 / 30 page

LTC6990

Rev. D

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PIN FUNCTIONS

V+ (Pin 1/Pin 5): Supply Voltage (2.25V to 5.5V). This

supply must be kept free from noise and ripple. It should

be bypassed directly to the GND pin with a 0.1µF capacitor.

DIV (Pin 2/Pin 4): Programmable Divider and Hi-Z Mode

Input. A V+ referenced A/D converter monitors the DIV

pin voltage (VDIV) to determine a 4-bit result (DIVCODE).

VDIV may be generated by a resistor divider between V+

and GND. Use 1% resistors to ensure an accurate result.

The DIV pin and resistors should be shielded from the

OUT pin or any other traces that have fast edges. Limit

the capacitance on the DIV pin to less than 100pF so that

VDIV settles quickly. The MSB of DIVCODE (Hi-Z) deter-

mines the behavior of the output when OE is driven low.

If Hi-Z = 0 the output is pulled low when disabled. If Hi-Z

= 1 the output is placed in a high impedance condition

when disabled.

SET (Pin 3/Pin 3): Frequency-Setting Input. The voltage

on the SET pin (VSET) is regulated to 1V above GND. The

amount of current sourced from the SET pin (ISET) pro-

grams the master oscillator frequency. The ISET current

range is 1.25µA to 40µA. The output oscillation will stop

if ISET drops below approximately 500nA. A resistor con-

nected between SET and GND is the most accurate way to

set the frequency. For best performance, use a precision

metal or thin film resistor of 0.5% or better tolerance

and 50ppm/°C or better temperature coefficient. For lower

accuracy applications an inexpensive 1% thick film resis-

tor may be used.

Limit the capacitance on the SET pin to less than 10pF

to minimize jitter and ensure stability. Capacitance less

than 100pF maintains the stability of the feedback circuit

regulating the VSET voltage.

(DCB/S6)

OE (Pin 4/Pin 1): Output Enable. Drive high to enable the

output driver (Pin 6). Driving OE low disables the output

asynchronously, so that the output is immediately forced

low (Hi-Z = 0) or floated (Hi-Z = 1). When enabled, the

output may temporarily remain low to synchronize with

the internal oscillator in order to eliminate pulse slivers.

GND (Pin 5/Pin 2): Ground. Tie to a low inductance

ground plane for best performance.

OUT (Pin 6/Pin 6): Oscillator Output. The OUT pin swings

from GND to V+ with an output resistance of approximately

30Ω. When driving an LED or other low-impedance load

a series output resistor should be used to limit source/

sink current to 20mA.

6990 PF

LTC6990

GND

SET

OUT

V+

DIV

0.1µF

RSET

V+

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