P89V660 datasheet(36/89 Pages) NXP

36 / 89 page

P89V660_662_664_1

Product data sheet

Rev. 01 — 2 May 2007

36 of 89

NXP Semiconductors

P89V660/662/664

80C51 with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI

88H

Previously

addressed with

own SLA address;

Data has been

received; NOT

ACK has been

returned.

Read data byte or 0000

Switched to not addressed SLA

mode; no recognition of own SLA or

general address.

read data byte

0001

Switched to not addressed SLA

mode; Own SLA will be recognized;

general call address will be

recognized if S1ADR.0 = 1.

read data byte

1000

Switched to not addressed SLA

mode; no recognition of own SLA or

General call address. A START

condition will be transmitted when

the bus becomes free.

read data byte

1001

Switched to not addressed SLA

mode; Own slave address will be

recognized; General call address

will be recognized if S1ADR.0 = 1. A

START condition will be transmitted

when the bus becomes free.

90H

Previously

addressed with

General call; Data

has been

received; ACK

has been

returned.

Read data byte or x

Data byte will be received and NOT

ACK will be returned.

read data byte

Data byte will be received and ACK

will be returned.

98H

Previously

addressed with

General call; Data

has been

received; NOT

ACK has been

returned.

Read data byte

0000

Switched to not addressed SLA

mode; no recognition of own SLA or

General call address.

read data byte

0001

Switched to not addressed SLA

mode; Own slave address will be

recognized; General call address

will be recognized if S1ADR.0 = 1.

read data byte

1000

Switched to not addressed SLA

mode; no recognition of own SLA or

General call address. A START

condition will be transmitted when

the bus becomes free.

read data byte

1001

Switched to not addressed SLA

mode; Own slave address will be

recognized; General call address

will be recognized if S1ADR.0 = 1. A

START condition will be transmitted

when the bus becomes free.

Table 24.

Slave Receiver mode …continued

Status code

(S1STA)

Status of the

I2C-bus

hardware

Application software response

Next action taken by I2C-bus

hardware

to/from S1DAT

to S1CON

STA

STO

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